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FX128 参数 Datasheet PDF下载

FX128图片预览
型号: FX128
PDF下载: 下载PDF文件 查看货源
内容描述: CML半导体产品 [CML Semiconductor Products]
分类和应用: 半导体
文件页数/大小: 11 页 / 180 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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Cordless Telephone Scrambler
FX128
1.3
Signal List
Signal
Name
XTALN
XTAL/CLOCK
-
TXOUT
TX GAIN AMP
OUT
TXIN
Type
O/P
I/P
N/C
O/P
O/P
I/P
This is the output of the clock oscillator inverter.
10.24MHz or 3.58/3.6864 MHz or an externally derived
clock is injected at this pin. See Figure 2.
No connection should be made to this pin.
This is the analogue output of the transmit channel. It
is internally biased at V
DD
/2.
This is the output pin of the transmit gain adjusting op-
amp. See Figure 3 for gain setting components.
This is the analogue signal input to the transmit
channel. This input goes to a gain adjusting op-amp
whose gain is set by external components.
See Figure 3.
No connection should be made to this pin.
Negative supply (GND)
This is an internally generated bias voltage output
(V
DD
/2)
No connection should be made to this pin.
This is the analogue signal input to the receive
channel. This input goes to a gain adjusting op-amp
whose gain is set by external components.
See Figure 3.
This is the output pin of the receive gain adjusting op-
amp. See Figure 3 for gain setting components.
This is the analogue output of the receive channel. It
is internally biased at V
DD
/2.
A logic 1 on this input selects the invert mode. A logic
0 selects the clear (not inverted) mode.
Selects either 10.24 or 3.58/3.6864 MHz clock
frequency. A logic “1” selects 10.24MHz and a logic
“0” selects 3.58/3.6864 MHz. This input is internally
pulled high.
Positive supply of 3.0 to 5.5V.
Description
Package
D4/P3
Pin No.
1
2
3
4
5
6
7
8
9
10
11
-
VSS
VBIAS
-
RXIN
N/C
P
OWER
O/P
N/C
I/P
12
RX GAIN AMP
OUT
RXOUT
CLR
CLOCK
SELECT
O/P
13
14
15
O/P
I/P
I/P
16
VDD
P
OWER
Notes:
I/P
O/P
N/C
=
=
=
Input
Output
No Connection
4