Application Notes
V
DD
C
10
V
SS
SERIAL CLOCK INPUT
LOAD/LATCH
LOAD/LATCH
CHANNEL 1 INPUT
CHANNEL 2 INPUT
CHANNEL 3 INPUT
CHANNEL 4 INPUT
C
4
V
BIAS
C
2
C
3
C
1
1
2
3
4
5
6
7
C
5
C
6
C
7
C
8
8
9
10
11
12
24
23
22
21
V
DD
CHANNEL 1 OUTPUT
CHANNEL 2 OUTPUT
CHANNEL 3 OUTPUT
CHANNEL 4 OUTPUT
X
SERIAL CONTROL DATA INPUT
FX009A
J - LG - LS
20
19
18
17
16
15
14
13
V
SS
CHANNEL 5 OUTPUT
CHANNEL 6 OUTPUT
CHANNEL 7 OUTPUT
CHANNEL 8 OUTPUT
CHANNEL 5 INPUT
CHANNEL 6 INPUT
CHANNEL 7 INPUT
CHANNEL 8 INPUT
C
9
Notes
(1) Channel Amplifiers 1 to 8 are inverting amplifiers.
(2) Analogue input capacitors C
1
to C
8
are only required for a.c.
input signals, d.c. input signals do not require these
components.
V
SS
Component
C
1
to C
8
C
9
C
10
Tolerances: C =
±
20%
Unit Value
0.1µ
1.0µ
1.0µ
Fig.2 External Component Connections
Application Recommendations
To avoid excess noise and instability in the final installation it is recommended that the following points be noted.
(a) A noisy or badly regulated power supply can
cause instability and/or variance of selected gains.
(b) Care should be taken on the design and layout of
the printed circuit board.
(c) All external components (Figure 2) should be
kept close to the FX009A package.
(d) Inputs and outputs should be screened wherever
possible.
(e) Tracks should be kept short.
(f) Analogue tracks should not run parallel to digital
tracks.
(g) A "Ground Plane" connected to V
SS
will assist in
eliminating external pick-up on the channel input and
output pins.
(h) Do not run high-level output tracks close to low-
level input tracks.
(i) Input signal amplitudes should be applied with due
regard to Figure 3.
SINAD (dB)
60
50
Input Frequency = 1.0kHz
Input Level 0dB ref: = 775mVrms
Ch1 to Ch8 Gain Set to 0dB
40
1000.0
30
-40
10.0
25.0
75.0
110.0
250.0
775.0
1730.0
mVrms
7
-30
-20
-17
-10
0
dB
Fig.3 SINAD vs Input Level – Typical Values
3
INPUT LEVEL
CMLMICRO [ CML MICROCIRCUITS ]
