Quadrature Modulator
CMX993/CMX993W
6
C-BUS Interface and Register Description
This block provides for the transfer of data and control information between the CMX993/CMX993W
internal registers and the µC over the C-BUS serial bus. Each transaction consists of a single Register
Address byte sent from the µC which may be followed by one Data byte sent from the µC, to be written into
one of the CMX993/CMX993W registers, as illustrated in Figure 9.
Data sent from the µC on the CDATA line is clocked into the CMX993/CMX993W on the rising edge of the
SCLK input. The C-BUS interface is compatible with most common µC serial interfaces and may also be
easily implemented with general purpose µC I/O pins controlled by a simple software routine. Figure 9
gives detailed C-BUS timing requirements.
The following C-BUS addresses and registers are:
General Reset Register (Address only, no data)
General Command, 8-bit write only.
Gain Control, 8-bit write only.
Address $01
Address $02
Address $05
Address $08
Frequency Control Register, 8-bit write only
Notes:
All registers will retain data if VDD and VDDIO are held high, even if all other power supply pins are
disconnected.
If clock and data lines are shared with other devices VDD and VDDIO must be maintained in their
normal operating ranges otherwise ESD protection diodes may cause a problem with loading
signals connected to SCLK and CDATA pins, preventing correct programming of other devices.
Other supplies may be turned off and all circuits on the IC may be powered down without causing
this problem.
6.1
General Reset Command: C-BUS address $01
This command resets the device and clears all bits in all registers. The General Reset command places
the device into powersave mode.
Whenever power is applied to the DVDD pin, a built in power-on-reset circuit ensures that the device
powers-up into the same state as that following a General Reset command. The RESETN pin on the
device will also reset the device into the same state.
2013 CML Microsystems Plc
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D/993/10