Marine VHF Audio and Signalling Processor
CMX885
DC Parameters (continued)
Notes
Min.
Typ.
Max.
Unit
25
XTAL/CLK
Input Logic 1
Input Logic 0
Input Current (Vin = DVDD
70%
–
–
–
–
–
–
–
30%
40
DVDD
DVDD
µA
)
)
Input Current (Vin = DVSS
–
µA
−40
C-BUS Interface and Logic Inputs
Input Logic 1
70%
–
−1.0
–
–
–
–
–
–
DVDD
DVDD
µA
Input Logic 0
Input Leakage Current (Logic 1 or 0)
Input Capacitance
30%
1.0
7.5
21
pF
C-BUS Interface and Logic Outputs
Output Logic 1
(IOH = 120µA)
(IOH = 1mA)
(IOL = 360µA)
(IOL = -1.5mA)
90%
80%
–
–
–
−1.0
−1.0
–
–
–
–
–
–
–
–
–
10%
15%
10
+1.0
+1.0
DVDD
DVDD
DVDD
DVDD
µA
µA
µA
Output Logic 0
“Off” State Leakage Current
21
26
IRQN
RDATA (output HiZ)
(Vout = DVDD
)
VBIAS
Output Voltage Offset wrt AVDD/2 (IOL
1μA)
Output Impedance
<
–
–
±2%
22
–
–
AVDD
kΩ
25
26
Characteristics when driving the XTAL/CLK pin with an external clock source.
Applies when utilising VBIAS to provide a reference voltage to other parts of the
system. When using VBIAS as a reference, VBIAS must be buffered. VBIAS must
always be decoupled with a capacitor as shown in Figure 2.
Notes:
© 2010 CML Microsystems Plc
61
D/885/3
CMLMICRO [ CML MICROCIRCUITS ]
