PMR Signalling Processor
CMX881
1.3
Signal List
Package
D6, E1
Signal
Name
Description
Pin No.
Type
23
VDD(D)
Power
The digital positive supply rail.
This pin should be
decoupled to V
device pins.
by a capacitor mounted close to the
SS(D)
5
VSS(D)
VDD(A)
Power
Power
The negative supply rail (digital ground).
18
The analogue positive supply rail. Levels and thresholds
within the device are proportional to this voltage. This pin
should be decoupled to V
close to the device pins.
by a capacitor mounted
SS(A)
9, 21
VSS(A)
IRQN
Power
The negative supply rail. Both pins must be connected to
analogue ground.
1, 2
3
NC
No connection should be made to these pins.
O/P
A 'wire-Orable' output for connection to the Interrupt
Request input of the host. This output is pulled down to
VSS(D) when active and is high impedance when inactive.
An external pull-up resistor is required.
4
REPLY_DATA
T/S
The C-BUS serial data output to the host. This output is
held at high impedance when not sending data to the host.
6
7
8
SERIAL_CLOCK
CMD_DATA
CSN
I/P
I/P
I/P
The C-BUS serial clock input from the host.
The C-BUS serial data input from the host.
The C-BUS data loading control function. Data transfer
sequences are initiated, and completed by the CSN signal.
2004 CML Microsystems Plc
8
D/881/7
CMLMICRO [ CML MICROCIRCUITS ]
