Baseband Processor For Mixed Mode Land Mobile Radio
CMX880
Operating Characteristics
For the following conditions unless otherwise specified:
External components as recommended in Figure 2;
Maximum load on digital outputs = 30pF;
Xtal Frequency = 15.36MHz ±0.01% (100ppm);
VDD = 2.7V to 5.5V; Tamb = - 40°C to +85°C;
Reference Signal Level = 308mV rms at 1kHz with VDD = 5V;
Signal to Noise Ratio (SNR) in bit rate bandwidth.
Input stage gain = 0dB;
Output stage attenuation = 0dB.
DC Parameters
Notes
Min.
Typ.
Max.
Units
Supply Current
TBD
TBD
TBD
TBD
TBD
TBD
IDD(D) (VDD = 5.0V)
21
21
21
21
21
21
15.0
3.0
9.0
2.0
TBD
mA
mA
mA
mA
µA
IDD(A) (VDD = 5.0V)
IDD(D) (VDD = 3.0V)
IDD(A) (VDD = 3.0V)
IDD(D) (Power-saved)
IDD(A) (Power-saved)
TBD
µA
“C-BUS” and FSB Interfaces
Input Logic "1"
70%
VDD
VDD
µA
Input Logic "0"
Input Leakage Current (Logic “1” or “0”)
Input Capacitance
30%
1.0
7.5
- 1.0
-
pF
Output Logic “1”
Output Logic “0”
“Off” State Leakage Current
(IOH = 120µA)
(IOL = 360µA)
90%
VDD
VDD
µA
µA
µA
10%
10
1
IRQN
(Vout = VDD(D))
- 1
- 1
REPLY_DATA (output HiZ)
1
CLOCK_OUT
Output Logic “1”
(IOH = 120µA)
(IOH = 1mA)
(IOL = 360µA)
(IOL = -1.5mA)
90%
80%
VDD
VDD
VDD
VDD
Output Logic “0”
10%
15%
CLOCK/XTAL
22
23
Input Logic "1"
Input Logic "0"
Input current (Vin = VDD
Input current (Vin = VSS
70%
- 40
-2%
VDD
VDD
µA
30%
40
)
)
µA
VBIAS
Output voltage offset wrt VDD/2 (I
Output impedance
< 1mA)
+2%
VDD
kW
OL
22
Notes:
21.
Not including any current drawn from the device pins by external circuitry.
[max limit awaiting further device characterisation]
22.
23.
Characteristics when driving the CLOCK/XTAL pin with an external clock source.
Applies when utilising VBIAS to provide a reference voltage to other parts of the
system. When using VBIAS as a reference, VBIAS must be buffered. VBIAS must
always be decoupled with a capacitor as shown in Figure 2.
ã 2001 Consumer Microcircuits Limited
69
D/880/1
CMLMICRO [ CML MICROCIRCUITS ]
