Baseband Processor For Mixed Mode Land Mobile Radio
CMX880
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C4FM sin(x)/x filtering of the ADC output, 24 symbol frame sync pattern detection, clock and level extraction
and tracking and symbol level decoding (without error correction). The decoded symbol data is formatted
into 8 bits, comprising 2 bits of symbol code and 6 bits of quality data. This is transferred to the DSP over
the FSB in 16-bit words (2 symbols) at 2400 words/s.
FFSK/MSK filtering, clock extraction, bit extraction and frame sync detection. Three different frame sync
patterns (SYNC and SYND are user programmable; SYNT is the inverse of SYNC) can be recognised.
Processing of signal data to the DACs:
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Initial stages of the receive audio output signal interpolation filtering.
Generate CTCSS tone for transmission.
Generate DTMF or Selcall tones for transmission.
Generate DCS code for transmission.
C4FM symbol level encoding.
CQPSK symbol encoding.
FFSK/MSK data modulation.
Transmit output signal filtering - Raised Cosine and Shaping, plus interpolation.
Auxiliary (RSSI) analogue signal
The CMX880 includes an RSSI input level sensing facility. This acts as an 8-bit successive approximation ADC
and a two level signal sensor. The two level sensor facility can be used in conjunction with the power saving
mode to wake up powered down blocks, and issue an interrupt on the IRQN line when the RSSI exceeds the
preset threshold level. The auxiliary ADC voltage reference is taken directly from the VDD(A) supply, so the
RSSI signal level should be derived from this same voltage.
1.5.1
Operation
1.5.1.1
Sleep Mode
Power-on reset or a “C-BUS” general reset places the CMX880 into sleep mode, which results in all internal
blocks, except the xtal clock circuit, being placed in power-saved mode. The xtal clock circuit can be power-
saved but this must be done by an explicit “C-BUS” command. Power saving is achieved by turning off bias
current sources or disabling local clocks, as appropriate.
During system standby periods, parts of the device can be put into sleep mode by the µC to conserve power.
The RSSI input level detector can be programmed so that when the RSSI exceeds a threshold, an interrupt can
be issued over the “C-BUS” and the receiver mode enabled (“woken up”) within 400µs. Power-on of the Bias
generator is of the order of 10’s off milliseconds, so for auto-start-up mode, Bias must be on. If this time is too
long to ensure no message data is lost, the FM disc. input and ADC path can be kept powered up whilst in
standby mode. The receive modes and transmit modes can also be activated by commands from the “C-BUS”.
On wake up, activation of the various signal path stages are phased appropriately to avoid causing unwanted
transients. More details are provided in section 1.5.1.5 on Configuration Options.
ã 2001 Consumer Microcircuits Limited
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D/880/1
CMLMICRO [ CML MICROCIRCUITS ]
