Line Powered Modem plus DAA
CMX878
If the time constant of R30 and C21 is large enough then the voltage on RT will remain below the
threshold of the 'B' Schmitt trigger for the duration of a ring cycle.
The time for the voltage on RT to charge from VSS towards SBYVDD can be derived from the formula
VRT = SBYVDD x [1 - exp(-t/(R30 x C21)) ]
As the Schmitt trigger high-going input threshold voltage (Vthi) has a minimum value of 0.56 x SBYVDD,
then the Schmitt trigger B output will remain high for a time of at least 0.821 x R30 x C21 following a
pulse at RD.
The values of R30 and C21 given in Figure 3 (1MW and 150nF) give a minimum RT charge time of 100
msec, which is adequate for ring frequencies of 10Hz or above.
The circuit will also respond to a telephone line voltage reversal. The BT specification SIN242 gives a
range of reversal voltages and slew times which must be detected. The slowest change required to be
detected is a +15V to –15V reversal between the two lines slewing in 30ms. In order to ensure detection
of this reversal the resistor R29 should be set to 300kW.
There are systems where the ‘ring’ signal is made up from consecutive fast line reversals – an example is
an ISDN terminal adapter which connects to local POTS ports. In such a case the CMX878 ring detector
circuit will give a better response with the inclusion of capacitor C22 (10nF).
If the Ring detect function is not used then pin RD should be connected to VSS and RT to SBYVDD.
1.4.2 Line-derived Power and Line Interfacing
The CMX878 has the building blocks for providing a variety of line interfacing solutions. Figure 4b shows
a suitable set of external components for interfacing to the line (explained in Figure 4c) . Note that some
of the component values vary according to whether the application is for American or European markets.
1.4.2.1 Standby Regulator
The Ring Detect and Wake input circuitry and the Standby C-BUS registers are permanently powered by
the voltage on the SBYVDD pin. This voltage is generated from the telephone line voltage by the Standby
Regulator, which consists of the high value resistor R3 and an on-chip zener diode (nominally 3.3V)
connected between the SBYVDD and VSS pins. D5 and C8 ensure that SBYVDD remains at a workable
value during short line breaks. D6 provides an alternative source of SBYVDD when the main Regulated
Supply is present.
1.4.2.2 The Regulated Supply and Line Volts Measurement
When the REGENAB pin is high M1 and Q1 connect the +ve line voltage to the line voltage
measurement divider R6, R7 and, via R8 and R9, to the AVDD regulator circuit Q2, Q3. An on-chip
comparator and bandgap reference control the base drive to Q2 via the VFB pin to keep the Regulated
Supply AVDD at nominally 3.3V.
The digital parts of the CMX878 are powered from the DVDD pin. This supply is derived from the
regulated supply AVDD through a decoupling network R2, C6, C7.
The Regulated Supply powers all parts of the CMX878 (except the Standby Circuits) and also the host
microcontroller. It is recommended that the total load on this supply should not exceed 10mA.
The Standby Supply will out-live the Regulated Supply following a loss of line voltage.
ã 2002 Consumer Microcircuits Limited
11
D/878/1
CMLMICRO [ CML MICROCIRCUITS ]
