FSK Modem and DTMF Codec
CMX865
5.10.5 Tx Data Register
Tx Data Register: 8-bit write-only.
C-BUS address $E3
7
6
5
4
3
2
1
0
Bit:
Data bits to be transmitted
In Tx Synchronous mode, this register contains the next 8 data bits to be transmitted. b0 is transmitted
first.
In Tx Start-Stop mode, the specified number of data bits will be transmitted from this register (b0 first). A
Start bit, a Parity bit (if required) and Stop bit(s) will be added automatically.
This register should only be written to when the Tx Data Ready bit of the Status Register is 1.
5.10.6 Rx Data Register
Rx Data Register: 8-bit read-only.
C-BUS address $E5
7
6
5
4
3
2
1
0
Bit:
Received data bits
In Rx synchronous mode, this register contains 8 received data bits, b0 of the register holding the earliest
received bit, b7 the latest.
In Rx Start-Stop mode, this register contains the specified number of data bits from a received character,
b0 holding the first received bit.
© 2005 CML Microsystems Plc
25
D/865/3
CMLMICRO [ CML MICROCIRCUITS ]
