Telephone Signalling Transceiver / Least Cost Router
CMX860
Certain events of the Status Register bits 14-5 will cause the IRQ bit b15 to be set to 1 if the
corresponding IRQ Mask bit is 1. These events are:
for Status Register Bit 14 (Ring Detect), Bit 10 (Energy or Call Progress / Programmable Tones
Detect) and Bit 8 (Hook Detect), both positive-going (0 to 1) and negative-going (1 to 0)
transitions,
for the remaining Status Register bits, only positive-going (0 to 1) transitions.
The IRQ bit is cleared by a read of the Status Register or a General Reset command or by setting b7 or
b8 of the General Control Register to 1.
The operation of the data demodulator and pattern detector circuits within the CMX860 does not depend
on the state of the Rx energy detect function.
Rx Signal
or Hook/Ring Detect
Hold time
Detect time
Note 3
Status Register bit 5,6,7,8,9 or 10
Status Register bit 15 (IRQ)
Note 1
Note 2
Note 4
IRQN output
Notes:
1. IRQ will go high only if appropriate IRQ Mask bit in General Control Register is set.
The IRQ bit is cleared by a read of the Status Register.
2. IRQN o/p will go low when IRQ bit high if IRQNEN bit of General Control Register is set.
3. In Rx Modem modes Status Register bits 5 and 6 are set by a Rx Data Ready or
Rx Data Underflow event and cleared by a read of the Rx Data Register.
4. Status Bits 14,10 and 8 will also set the IRQ bit to 1 on a negative-going transition.
Figure 8a Operation of Status Register bits 5-10
The IRQN output pin will be pulled low (to DVSS) when the IRQ bit of the Status Register and the
IRQNEN bit (b6) of the General Control Register are both 1.
Changes to Status Register bits caused by a change of Tx or Rx operating mode can take up to 150ms to
take effect.
In Powersave mode or when the Reset bit (b7) of the General Control Register is 1, the Ring Detect bit
(b14) and the Hook Detect bit (b8) continue to operate.
ã 2002 Consumer Microcircuits Limited
31
D/860/5
CMLMICRO [ CML MICROCIRCUITS ]
