Telephone Signalling Transceiver / Least Cost Router
CMX860
1.5.12.2
General Control Register
General Control Register: 16-bit write-only. 'C-BUS' address $E0
This register controls general features of the CMX860 such as the Powersave mode, the IRQ mask bits
and the Relay Drive output. It also allows the fixed compromise equalisers in the Tx and Rx signal paths
to be disabled if desired, and sets the internal clock dividers to use either a 11.0592 or a 12.288 MHz
XTAL frequency.
All bits of this register are cleared to 0 by a General Reset command.
15
0
14
0
13
0
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit:
Xtal
freq
Hook
IRQ
Equ
Rly
drv
Pwr
Rst
Irqn
en
IRQ Mask Bits
Mask
General Control Register b15-13: Reserved, set to 000
General Control Register b12: Xtal frequency
This bit should be set according to the Xtal frequency.
b12 = 1
b12 = 0
11.0592MHz
12.2880MHz
General Control Register b11: Hook Detect IRQ Mask bit
This bit affects the operation of the IRQ bit of the Status Register as described in section
1.5.12.8
General Control Register b10: Tx and Rx Fixed Compromise Equaliser
This bit allows the Tx and Rx fixed compromise equaliser in the modem transmit and receive
filter blocks to be disabled.
b10 = 1
b10 = 0
Disable equaliser
Enable equaliser (1200bps modem mode)
General Control Register b9: Relay Drive
This bit directly controls the RDRVN output pin.
b9 = 1
b9 = 0
RDRVN output pin pulled to DVSS
RDRVN output pin pulled to DVDD
ã 2002 Consumer Microcircuits Limited
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