Telephone Signalling Transceiver / Least Cost Router
CMX860
1.5.7 Rx Modem Filter and Equaliser
When the receive part of the CMX860 is operating as a modem, the received signal is fed to a bandpass
filter to attenuate unwanted signals and to provide fixed compromise line equalisation. The line equaliser
may be enabled or disabled by bit 10 of the General Control Register and compensates for one quarter of
the relative amplitude and delay distortion of ETS Test Line 1.
A typical response of this filter, including the line equaliser, is shown in Figure 5b. The effect of external
components should also be considered in determining the overall response:
10
0
-10
-20
-30
dB
-40
-50
-60
0
0.5
1
1.5
2
2.5
3
3.5
4
kHz
Figure 5b V.23 / Bell 202 Rx Filters
The signal level at the output of the Receive Modem Filter and Equaliser is measured in the Modem
Energy Detector block, compared to a threshold value, and the result controls bit 10 of the Status
Register.
The output of the Receive Modem Filter and Equaliser is also fed to the FSK demodulator.
1.5.8 FSK Demodulator
The FSK demodulator recognises individual frequencies as representing received ‘1’ or ‘0’ data bits:
The FSK demodulator produces a serial data bit stream which is fed to the Rx USART block, see
Figure 6a. This bit stream is also monitored for continuous ‘1010’s and for continuous 1’s. The outputs
of these pattern detectors control bits 9 and 7 respectively of the Status Register.
1.5.9 Rx Data Register and USART
The Rx USART can be programmed to treat the received data bit stream as Synchronous data or as
Start-Stop characters.
In Synchronous mode the received data bits are all fed into the Rx Data Buffer which is copied into the
'C-BUS' Rx Data Register after every 8 bits.
In Start-stop mode the USART Control logic looks for the start of each character, then feeds only the
required number of data bits (not parity) into the Rx Data Buffer. The parity bit (if used) and the presence
ã 2002 Consumer Microcircuits Limited
16
D/860/5