Digital PMR (dPMR) Baseband Processor
CMX8341
3
Signal List
CMX8341L8
Pin No.
1
3
7
10
11
12
13
15
16
18
20
22
23
24
25
28
29
30
33
34
36
37
41
42
48
50
54
55
56
Name
GPIOB
SYSCLK1
TXENA
DISC
-
DISCFB
-
ALT
ALTFB
MICFB
MIC
OUTP
MOD1
MOD2
OUTN
AUDIO
AUXADC1
AUXADC2
AUXADC3
AUXADC4
AUXDAC1
AUXDAC2
-
AUXDAC3
AUXDAC4
SYNC
-
REFCLK
-
Pin
Type
IP + PU
or OP
OP
OP
IP
-
OP
-
IP
OP
OP
IP
OP
OP
OP
OP
OP
IP
IP
IP
IP
OP
OP
-
OP
OP
BI
-
IP
-
General-purpose input/output.
Synthesised Digital System Clock Output 1
Tx Enable – active low when in Tx
Channel 1 inverting input
Connect to pin 41
Channel 1 input amplifier feedback
Connect to pin 27 (BIAS)
Channel 2 inverting input
Channel 2 input amplifier feedback
Channel 3 input amplifier feedback
Channel 3 inverting input
Audio Positive Output in digital radio mode
Modulator 1 output
Modulator 2 output
Audio Negative Output in digital radio mode. Leave
unconnected if switching between the digital (OUTP) output
and the analogue (AUDIO) output. See Figure 4.
Audio output in analogue radio mode
Auxiliary ADC input 1
Auxiliary ADC input 2
Auxiliary ADC input 3
Auxiliary ADC input 4
Auxiliary DAC output 1
Auxiliary DAC output 2
Connect to pin 11
Auxiliary DAC output 3
Auxiliary DAC output 4 / Filtered Sub-Audio Output
SYNC output. Connect to pin 49.
Connect to pin 56
Input from the external clock source
Connect to pin 54
Each of the two ADC blocks
can select its input signal from
any one of these input pins, or
from the MIC, ALT or DISC
input pins. See section 8.9 for
details.
Description
2014 CML Microsystems Plc
9
D/8341/7
CMLMICRO [ CML MICROCIRCUITS ]
