Family Radio CTCSS 'Type 2' Encoder and Decoder
CMX808A
1.7.1 Electrical Performance (continued)
Timing Diagrams
Figure 6 "C-BUS" Timing
For the following conditions unless otherwise specified:
Xtal Frequency = 4.0MHz, V = 3.0V to 5.0V, Tamb = -40°C to +85°C.
DD
Parameter
Notes
Min.
2.0
4.0
-
Typ.
Max.
Units
µs
t
t
t
t
t
t
"CS-Enable to Clock-High"
Last "Clock-High to CS-High"
"CS-High to Reply Output 3-state"
"CS-High" Time between transactions
"Inter-Byte" Time
-
CSE
CSH
HIZ
-
2.0
-
µs
µs
2.0
4.0
2.0
µs
CSOFF
NXT
CK
-
µs
"Clock-Cycle" time
-
µs
Notes: 1. Depending on the command, 1 or 2 bytes of COMMAND DATA are transmitted to the
peripheral MSB (Bit 7) first, LSB (Bit 0) last. REPLY DATA is read from the peripheral MSB
(Bit 7) first, LSB (Bit 0) last.
2. Data is clocked into and out of the peripheral on the rising SERIAL CLOCK edge.
3. Loaded commands are acted upon at the end of each command.
4. To allow for differing µController serial interface formats "C-BUS" compatible ICs are able to
work with either polarity SERIAL CLOCK pulses.
2003 CML Microsystems Plc
20
D/808A/6
CMLMICRO [ CML MICROCIRCUITS ]
