AIS Baseband IC with/without RF Synthesiser
CMX7032/CMX7042
7
Detailed Descriptions
7.1 Clock Source
The CMX7032/CMX7042 can be used with either a 9.6MHz xtal or a 19.2MHz oscillator. The RF clock
(RFCLK) should also be derived from this source to avoid the generation of unwanted spurious signals.
7.2 Host Interface
This section provides a general description of the C-BUS serial interface protocol used to transfer data,
control and status information between the CMX7032/CMX7042 and its host. On the CMX7032 only, the
C-BUS serial interface must be enabled by permanently connecting CBUSMODE (pin 57) to digital ground
(DV ).
SS
C-BUS is a serial interface, similar to SPI, that uses a simple transaction-oriented command/response
protocol with addressing to access specific registers within the CMX7032. Each C-BUS transaction
consists of a single Register Address/Command byte (A/C byte) sent from the µC which may be followed
by one or more data byte(s) sent from the µC to be written into one of the CMX7032’s Write Only registers,
or one or more data byte(s) read out from one of the CMX7032’s Read Only registers, as illustrated in
Figure 6.
Data sent from the µC on the CDATA line is clocked into the CMX7032/CMX7042 on the rising edge of the
SCLK input. RDATA sent from the CMX7032/CMX7042 to the µC is valid when the SCLK is high. The
CSN line must be held low during a data transfer and kept high between transfers. The C-BUS interface is
compatible with most common µC serial interfaces and may also be easily implemented with general
purpose µC I/O pins controlled by a simple software routine.
The number of data bytes following an A/C byte is dependent on the value of the A/C byte. The most
significant bit of the address or data is sent first. For detailed timings see section 8.2.
2012 CML Microsystems Plc
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D/7032/42_FI1.2/13
CMLMICRO [ CML MICROCIRCUITS ]
