Pair Gain Dual SPM Detector
CMX661
Package
D4
Pin No.
14
Package
P3
Pin No.
14
Name
D1
Signal
Type
I/P
Description
The MSB of the two bits which set the 'Will
Decode' bandwidth of the CMX661.
Selects the system frequency. High (logic ‘1’) =
12kHz; Low (logic ‘0’) = 16kHz. This signal has
an internal pullup resistor, so if left unconnected
the CMX661 will detect 12kHz by default.
The positive supply rail. Critical levels and
voltages within the CMX661 are dependent
upon this supply. This pin should be decoupled
to V
SS
by a capacitor mounted close to the
device pins.
15
15
SYSTEM
SELECT
I/P
16
16
V
DD
POWER
Notes:
I/P
O/P
BI
=
=
=
Input
Output
Bidirectional
©
2002 CML Microsystems Plc
5
D/661/3