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CMX625D5 参数 Datasheet PDF下载

CMX625D5图片预览
型号: CMX625D5
PDF下载: 下载PDF文件 查看货源
内容描述: ISDN TA POTS接口 [ISDN TA POTS Interface]
分类和应用: 电信集成电路电信电路光电二极管综合业务数字网
文件页数/大小: 34 页 / 857 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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ISDN TA POTS Interface
CMX625
1.5
General Description
The CMX625 is a telecom tone generator, DTMF tone encoder/decoder and PCM Codec-Filter for ISDN
interfaces. The PCM Codec-Filter performs voice digitisation and reconstruction and incorporates encoder
bandpass and decoder lowpass filters with pre and post-filtering with selectable A-law and µ-law
companding following ITU-T recommendation G.711. The device has separate output ports for the four
different classes of signals encoded. These include Ringing signals, In-band tones or FSK data at
1200bps, high frequency metering pulses (SPM tones) and DAC signals. It has a transmit level attenuator
for In-band tones or FSK data and an envelope control for SPM tones. The device also has an
uncommitted Tx output buffer for filtering and impedance matching. The functions are controlled via an
IOM-2 serial bus interface.
Frequency and timing accuracy of the CMX625 is supplied by the Data Clock (DCL) of the IOM-2 serial
bus interface. If the bus is deactivated, DCL is held in a low state.
The CMX625 can be reset externally by driving the RESET pin low. It resets all the internal register bits
and ensures that the interface always starts from a known state. The device can also be reset by issuing
a RESET command. See section 1.5.14. Commands to enable and disable individual functions are also
shown in this section. Approximately 50ms should be allowed for the Tx dc level to settle at V
BIAS
before
enabling the Tx functions (set bit 6 of the MODE Register to ‘1’) after the CMX625 has been reset.
1.5.1
IOM-2 Serial Bus Interface
®
The IOM -2 (ISDN Oriented Modular revision 2) is an industry standard serial bus for interconnecting
telecommunications IC’s. (Refer to the IOM-2 Interface Reference Guide, Industry Standard Bus by
®
Advanced Micro Devices). The bus is an evolution of the IOM interface and is also known as the GCI
(General Circuit Interface).
The IOM-2 bus provides a symmetrical full duplex communication link, containing user data,
control/programming and status channels. There are two basic modes of operation known as Terminal
mode (TE mode) and non-Terminal mode (non-TE or Line Card mode). These modes differ in the frame
structure and data rate. The frame rate remains at 8kHz for each mode. The CMX625 acts as a timing
and control slave to the upstream device.
The various channels are time multiplexed over a basic four wire serial interface, namely FSC, DCL, DD
and DU. Frames are delimited by an 8kHz Frame Synchronisation Clock (FSC) which is generated by the
upstream device. The Data Clock (DCL) clocks data on and off the bus and runs at either 1.536MHz (TE
mode) or 4.096MHz (non-TE mode). It is always generated by the upstream device. Data Downstream
(DD) receives data from the network. Data Upstream (DU) transmits data to the network. When the bus
is deactivated or when data is not being transmitted, DD and DU is held in a high impedance state. The
DD and DU bus are driven by open drain transistors such that all DD’s and DU’s can be connected
together. Bus reversal (in TE mode) allows the DD and DU pins to be both inputs and outputs in the IC1
and IC2 channels. It allows use of the CMX625 with post processing devices that are IOM-2 compliant.
When other devices are connected to the IOM-2 bus the three Slot Address pins (SA0, SA1 and SA2)
provide a unique address, allowing the CMX625 to be individually addressed. The Device Select pin (DS)
allows two CMX625 devices sharing a slot address to be individually addressed in non-TE mode.
The remote digital IOM loopback is enabled when bit 3 of the IOM CONTROL Register is set to ‘1’. This
loops back the data arriving on the IOM-2 bus and sends it back again. Unused bits in the frame structure
are ignored if not required by the CMX625. These bits will be set to '1' when the frame is transmitted
upstream.
2001 Consumer Microcircuits Limited
7
D/625/2