ISDN TA POTS Interface
CMX625
CMX625
D5/P4
Pin No.
12
13
14
15
16
Signal
Name
V
SS
RXP
RXN
RXO
V
BIAS
Type
Power
I/P
I/P
O/P
O/P
Description
The negative supply rail (ground).
The non-inverting input of the receive op-amp.
The inverting input of the receive op-amp.
The output of the receive op-amp.
An internally generated bias voltage of V
DD
/2, except
when the device has been reset, V
BIAS
will discharge to
V
SS.
It should be decoupled to V
SS
by a capacitor
mounted close to the device pins.
The sinewave output of the Tones and FSK signal
generators.
The output of the buffer amplifier.
The inverting input to the buffer amplifier.
The inverted output of the buffer amplifier.
The output from the digital-to-analogue converter.
The square, trapezoidal and sinusoidal wave output from
the Ringing Signal Generator.
The sinewave output of the SPM signal generator.
The positive supply rail. Levels and thresholds within the
device are proportional to this voltage. It should be
decoupled to V
SS
by a capacitor mounted close to the
device pins.
17
18
19
20
21
22
23
24
TONEFSK
TXO
TXN
TXON
DAC OUT
RING
SPM
V
DD
O/P
O/P
I/P
O/P
O/P
O/P
O/P
Power
Notes:
I/P
O/P
BI
N/C
=
=
=
=
Input
Output
Bi-directional
No (external) Connection
This device is capable of detecting and decoding small amplitude signals. To achieve this V
DD
and V
BIAS
decoupling and protecting the receive path from extraneous in-band signals are very
important. It is recommended that the printed circuit board is laid out with a ground plane in the
CMX625 area to provide a low impedance connection between the V
SS
pin and the V
DD
and V
BIAS
decoupling capacitors.
2001 Consumer Microcircuits Limited
5
D/625/2
CMLMICRO [ CML MICROCIRCUITS ]
