V23 / Bell 202 Modem
CMX624
1.3
Signal List
Signal
Description
CMX624
D2/D5/P4
Pin No.
1
2
Name
XTALN
XTAL/CLOCK
Type
O/P
I/P
The output of the on-chip Xtal oscillator inverter.
The input to the oscillator inverter from the Xtal
circuit or external clock source.
The ‘C-BUS’ serial clock input from the
µC.
See
Section 1.5.11
The ‘C-BUS’ serial data input from the
µC.
A 3-state ‘C-BUS’ serial data output to the
µC.
This output is high impedance when not sending
data to the
µC.
The ‘C-BUS’ transfer control input provided by
the
µC.
A ‘wire-ORable’ output for connection to a
µC
Interrupt Request input. This output is pulled
down to Vss when active and is high impedance
when inactive. An external pullup resistor is
required.
The Tx analogue signal output.
The output of the line driving amplifier.
The inverting input to the line driver amplifier.
The inverted output of the line driving amplifier.
The negative supply rail (ground).
Internally generated bias voltage of V
DD
/2,
except when the device is in ‘Zero Power’ mode
when V
BIAS
will discharge to V
SS
. Should be
decoupled to V
SS
by a capacitor mounted close
to the device pins.
Relay drive open drain output. This output is
pulled down to V
SS
when active and is high
impedance when inactive.
The non-inverting input to the Rx input amplifier.
3
SERIAL
CLOCK
COMMAND
DATA
REPLY DATA
I/P
4
5
I/P
T/S
6
CSN
I/P
7
IRQN
O/P
8
9
10
11
12
13
TOP
TXO
TXN
TXON
V
SS
V
BIAS
O/P
O/P
I/P
O/P
Power
O/P
14
RLYDRV
O/P
15
RXP
I/P
2003 CML Microsystems Plc
4
D/624/7
CMLMICRO [ CML MICROCIRCUITS ]
