RALCWI Vocoder
CMX608/CMX618/CMX638
Notes: 1. Tamb = 25°C, not including any current drawn from the device pins by external circuitry.
2. Maximum 30pF load on each C-BUS or CODEC (SSP) interface line.
3. Measured whilst driving a 32 resistive load between OUT P and OUT N pins.
4. Timing for an external input to the XTALin pin.
5. Differential measurement, 10Hz to 4kHz bandwidth.
6. With "clock throttling" enabled. Note that after Reset, "clock throttling" has to be specifically
enabled, by setting bit 4 of the POWERSAVE register ($09) to '1'.
7. Care should be taken to avoid shorting the OUTP and OUTN pins together, or to VDD or VSS.
8. Differential measurement, 300Hz to 4kHz bandwidth, no load.
9. 1.8V nominal supply.
10. 3.3V nominal supply.
11. This is the maximum signal range on each pin of the differential input. The common mode
voltage can be any voltage within this range but, for optimum dynamic range, it should be
set to about AVDD /2. If the inputs are ac coupled, on-chip resistors will set the dc bias of
each input to this voltage automatically.
12. This is the maximum differential peak to peak signal amplitude, which corresponds to a
signal on each input of (AVDD /2 ± 25% AVDD ). Exceeding this can result in increased
distortion products.
13. Because the amplitude of speech fluctuates, it is important to set the average speech level
such that the level of distortion that results from the occasional overdriving of the inputs is at
an acceptable level.
14. This is the maximum voltage on each pin of the differential output, such that the device does
not start to introduce significant harmonic distortion.
15. The internal ADC is a sigma-delta type which samples at 2.4MHz. It is important that there is
no significant energy close to this frequency or at any of its harmonics, thus avoiding the
need for an external low-pass anti-alias filter.
16. The internal DAC is a sigma-delta type which samples at 2.4MHz. It will output energy at this
frequency and its harmonics. Should this present a problem, it is suggested that some
external filtering be used at the audio outputs.
17. Excludes the 20/40/60/80 ms sample collection period.
18. Internal gain settings are 0dB on input gain for the optimum vocoded level and
+6dB on output gain for the optimum vocoded level, subject to further characterisation.
19. ADC or DAC disabled, Vocoder is disabled.
20. ADC or DAC enabled, Vocoder is disabled.
21. ADC or DAC enabled, Vocoder is enabled.
2014 CML Microsystems Plc
65
D/608_18_38/11
CMLMICRO [ CML MICROCIRCUITS ]
