RALCWI Vocoder
CMX608/CMX618/CMX638
IRQN will go low. The SVCACK register ($2E) will contain the status value, indicating whether the
write to this register was successful. No other C-BUS registers should be read from or written to
whilst this command is in progress. Writing reserved values will result in an error status being
returned in the SVCACK register.
SEL1 / SEL0 = '00' - Output ports
7
0
6
0
5
0
4
0
3
0
2
0
1
REC
0
EEC
This sub-register allows direct control of the two output ports, EEC and REC. Whilst these output
ports can be used as general output ports, REC is intended to control the RESET of an external
CODEC and EEC is intended to control an ENABLE, if one is available.
Bit 0
EEC (Enable External CODEC)
Setting this bit to '1' causes the EEC port to go high.
Clearing this bit to '0' causes the EEC port to go low.
Bit 1
REC (Reset External CODEC)
Setting this bit to '1' causes the REC port to go high.
Clearing this bit to '0' causes the REC port to go low.
Bits 5-2
Reserved
These bits should be cleared to '0' for correct device operation.
SEL1 / SEL0 = '01' - Select CODEC
7
0
6
1
5
0
4
0
3
2
1
0
CODEC
This sub-register controls the basic settings of the SSP (Synchronous Serial Port).
Bits 3-0
CODEC
This field specifies the type of external CODEC to be used. Bit 3 is the msb.
0 Reserved
1 CODEC_GENERIC1
This specifies a CODEC that samples its data on the positive edge of SCLK. The SSP's output
FIFO will not be primed.
2 CODEC_GENERIC2
This specifies a CODEC that samples its data on the positive edge of SCLK. The SSP's output
FIFO will be primed.
3 CODEC_GENERIC3
This specifies a CODEC that samples its data on the negative edge of SCLK. The SSP's output
FIFO will not be primed.
4 CODEC_GENERIC4
This specifies a CODEC that samples its data on the negative edge of SCLK. The SSP's output
FIFO will be primed.
5 CODEC_PCM3500 - Burr-Brown PCM3500
This specifies a setting suitable for the PCM3500.
2014 CML Microsystems Plc
39
D/608_18_38/11
CMLMICRO [ CML MICROCIRCUITS ]
