RALCWI Vocoder
CMX608/CMX618/CMX638
To increase the data bandwidth between the µC and the CMX608/CMX618/CMX638, certain of the C-BUS
read and write registers are capable of data-streaming operation. This allows a single address byte to be
followed by the transfer of multiple read or write data words via a FIFO, all within the same C-BUS
transaction. This can significantly increase the transfer rate of large data blocks, as shown in Figure 17.
Example of C-BUS data-streaming (8-bit write register)
CSN
CLK
CDATA
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
Address First byte Second byte
7 6 5 4 3 2 1 0
Last byte
…
Hi-Z
RDATA
Example of C-BUS data-streaming (8-bit read register)
CSN
CLK
CDATA
7 6 5 4 3 2 1 0
Address
Hi-Z
RDATA
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
First byte Second byte
7 6 5 4 3 2 1 0
Last byte
…
Figure 17 C-BUS Data-Streaming Operation
Filling a FIFO to a pre-determined level (e.g. 128 bytes) can be done in one of two ways:
1) Stream an entire C-BUS message consisting of 1 address byte followed by 128 data bytes to the FIFO.
2) Stream multiple C-BUS messages consisting of any number of address bytes from 1 - 128 and any
number of data bytes from 1 - 128, as long as 128 data bytes eventually get across into the FIFO.
i.e.
i) 128 x single C-BUS writes is a valid transfer (128 address bytes + 128 data bytes)
ii) 64 x C-BUS writes is a valid transfer (64 address bytes + 64*2 data bytes)
It is not a requirement that data MUST be streamed into the FIFOs in one single transaction. If it is more
convenient, the data streaming facility need not be used at all.
2014 CML Microsystems Plc
30
D/608_18_38/11
CMLMICRO [ CML MICROCIRCUITS ]
