欢迎访问ic37.com |
会员登录 免费注册
发布采购

CMX608Q3 参数 Datasheet PDF下载

CMX608Q3图片预览
型号: CMX608Q3
PDF下载: 下载PDF文件 查看货源
内容描述: [PCM Codec, 1-Func, LQFP-48]
分类和应用: PC电信电信集成电路
文件页数/大小: 72 页 / 2050 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
 浏览型号CMX608Q3的Datasheet PDF文件第42页浏览型号CMX608Q3的Datasheet PDF文件第43页浏览型号CMX608Q3的Datasheet PDF文件第44页浏览型号CMX608Q3的Datasheet PDF文件第45页浏览型号CMX608Q3的Datasheet PDF文件第47页浏览型号CMX608Q3的Datasheet PDF文件第48页浏览型号CMX608Q3的Datasheet PDF文件第49页浏览型号CMX608Q3的Datasheet PDF文件第50页  
RALCWI Vocoder  
CMX608/CMX618/CMX638  
5.10.3.  
8 Bit Read-Only Registers  
ECFIFO register address $24  
7
6
5
4
3
2
1
0
FIFO Word Count  
This read-only register holds the current count of words in the external CODEC control FIFO. The  
FIFO can currently hold up to 16 words for external CODEC control. This register is updated  
whenever the EXCODECCMD register ($12) is written, or the EXCODECCONT register ($0B) is  
written with ECC_FIFO_CLEAR or ECC_FIFO_COUNT. Bit 7 is the msb.  
SVCACK register address $2E  
7
6
5
4
3
2
1
0
X
X
X
X
X
X
X
ACK  
This read-only register contains the acknowledgement result from a service request or some other  
operation, as detailed in the STATUS register ($40). The contents of this register are only valid  
after status bit 14 or 15 (in certain cases) has been set, and before another C-BUS register is  
written. See section 6.7 for further details.  
Bit 0  
ACK  
This bit is set to '1' to indicate a success result.  
This bit is cleared to '0' to indicate an error or unsuccessful result.  
Bits 1 to 7  
These bits are undefined.  
FRAMETYPER register address $2F  
7
6
5
4
3
2
1
0
Frame 4  
Frame 3  
Frame 2  
Frame 1  
This read-only register contains the frame type for each of the 20ms raw Vocoder frames. The  
information in this register is used when the device is configured to produce raw Vocoder frames  
without any FEC and the DTX (discontinuous transmission) option is enabled. If the DTX option is  
disabled, the value in this register is undefined.  
The device can be set to encode over a period of 20ms, 40ms, 60ms or 80ms, producing 1, 2, 3 or  
4 frames. For each frame, this register holds the corresponding 2-bit frame type attribute.  
Bit 1/3/5/7  
Bit 0/2/4/6  
Frame Type  
0
0
1
1
0
1
0
1
Data frame  
reserved  
SID frame  
reserved  
For a data frame, the full frame must be transmitted across the channel. For the SID frame, only  
the first 18 bits of the frame need to be sent. In all cases, the frame type attribute must be sent.  
NOTE: The same number of bytes must be read from the ENCFRAME register ($30), regardless  
of frame type. This information indicates how much of it must be sent across the communications  
channel.  
2012 CML Microsystems Plc  
46  
D/608_18_38/10