Calling Line Identifier with VMWI
CMX612
Notes:
1. At 25°C, not including any current drawn from the CMX612 pins by external circuitry
other than X1, C1 and C2.
2. RD, RXCK, MODE 2 inputs at VSS, MODE 1 input at VDD. See also Figure 13.
3. All conditions must be met to ensure detection.
4. For VDD = 3.3V with equal level tones and with the input signal amplifier external
components as Section 1.4. The internal threshold levels are proportional to VDD. To
cater for other supply voltages or different signal level ranges the voltage gain of the
input signal amplifier should be adjusted by selecting the appropriate external
components as described in Section 1.5
5. Flat noise in 300 - 3400Hz band for V23, 200 - 3200Hz for Bell202.
6. Meeting any of these conditions will ensure non-detection.
7. Open loop, small signal low frequency measurements.
8. Timing for an external input to the CLOCK/XTAL pin.
9. Tone duration between 80ms and 90ms will normally give 100% detection.
However, under certain conditions (e.g. exact 4:5 ratio between tone frequencies and
adverse twist conditions) up to 0.3% of tones may not be detected. Above 90ms,
detection is 100%.
ã 2002 Consumer Microcircuits Limited
24
D/612/3
CMLMICRO [ CML MICROCIRCUITS ]
