Calling Line Identifier with VMWI
CMX612
( 0.7 + Vthi x [R1 + R2 + R3] / R2 ) x 0.707 Vrms
where Vthi is the high-going threshold voltage of the Schmitt trigger A (see Section 1.7).
With R1, R3 and R4 all at 470kW, as Figure 2, setting R2 to 68kW will guarantee detection of ringing
signals of 40Vrms and above for VDD over the range 2.7 to 5.5V.
A line polarity reversal may be detected using the same circuit but there will be only one pulse at RD.
The BT specification SIN242 says that the circuit must detect a +15V to -15V reversal between the two
lines slewing in 30ms. For a linearly changing voltage at the input to C3 (or C4), then the voltage
appearing at the RD pin will be:
dV/dt x C3 x [ 1 - exp(-t/T) ] x R2
where T = C3 x (R1 + R2 + R3) and dV/dt is the input slew rate.
For dV/dt = 500V/sec (15V in 30ms), R1, R3 and R4 all 470kW and C3, C4 both 0.1mF as Figure 2, then
setting R2 to 390kW will guarantee detection at VDD = 5.5V.
If the time constant of R5 and C5 is large enough then the voltage on RT will remain below the threshold
of the 'B' Schmitt trigger keeping the DET and/or IRQN outputs active for the duration of a ring cycle.
The time for the voltage on RT to charge from VSS towards VDD can be derived from the formula
V
= VDD x [1 - exp(-t/(R5 x C5)) ]
RT
As the Schmitt trigger high-going input threshold voltage (Vthi) has a minimum value of 0.56 x VDD , then
the Schmitt trigger B output will remain high for a time of at least 0.821 x R5 x C5 following a pulse at
RD.
Using the values given in Figure 2 (470kW and 0.33mF) gives a minimum time of 100 ms (independent of
VDD ), which is adequate for ring frequencies of 10Hz or above.
If necessary, the µC can distinguish between a ring and a reversal by timing the length of the IRQN or
DET output.
1.5.10 Xtal Osc and Clock Dividers
Frequency and timing accuracy of the CMX612 is determined by a 3.579545MHz clock present at the
XTAL pin. This may be generated by the on-chip oscillator inverter using the external components C1, C2
and X1 of Figure 2, or may be supplied from an external source to the XTAL input, in which case C1, C2
and X1 should not be fitted.
The oscillator is turned off in 'Zero-Power' mode.
If the clock is provided by an external source which is not always running, then the MODE 1 input must
be set high and the MODE 2 input must be set low when the clock is not available. Failure to observe this
rule may cause a significant rise in the supply current drawn by CMX612 as well as generating undefined
states of the RXD, DET and IRQN outputs.
ã 2002 Consumer Microcircuits Limited
13
D/612/3
CMLMICRO [ CML MICROCIRCUITS ]
