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CMX608 参数 Datasheet PDF下载

CMX608图片预览
型号: CMX608
PDF下载: 下载PDF文件 查看货源
内容描述: [Integrated Input and Output Channel Filters]
分类和应用:
文件页数/大小: 70 页 / 3411 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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RALCWI Vocoder  
CMX608/CMX618/CMX638  
7.1.3.  
Operating Characteristics  
Using the recommended components in Figure 2 and Figure 3, and for the following conditions unless  
otherwise specified:  
Xtal Freq. = 12.0MHz ±100ppm, VDDPA = AVDD = IOVDD = 3.0V to 3.6V; VDD = 1.7V to 1.9V; Tamb = 25°C;  
all gain settings are 0dB. Figures apply to CMX608, CMX618 and CMX638, unless otherwise stated.  
Note: Parametric measurements in this section are subject to further characterisation.  
Notes  
Min.  
Typ. Max.  
Units  
DC Parameters  
I
Total powersaved  
DD  
1
50  
µA  
(ENABXTAL pin connected to VSS)  
I
I
I
Digital  
IODigital  
Digital  
(after Reset, Xtal enabled)  
(after Reset, Xtal enabled)  
(CMX618/638 only)  
1, 6, 9, 19  
1, 10, 19  
1, 6, 9, 20  
14.0  
0.5  
17.5  
mA  
mA  
mA  
DD  
DD  
DD  
Operational Modes  
I
I
I
IODigital  
(CMX618/638 only)  
1, 10, 21  
1, 10, 21  
1, 10, 21  
0.6  
0.7  
6.5  
mA  
mA  
mA  
DD  
DD  
DD  
Analogue PA (CMX618/638 only)  
Analogue  
Analogue  
Digital  
(CMX618 only, Vocoder  
encoding)  
(CMX618 only, Vocoder  
decoding)  
I
I
I
I
I
1, 10, 21  
1, 6, 9  
1, 6, 9  
1, 9  
2.8  
33  
mA  
mA  
mA  
mA  
mA  
DD  
DD  
DD  
DD  
DD  
(CMX608/618 Vocoder encoding  
enabled with clock throttling)  
(CMX608/618 Vocoder decoding  
enabled with clock throttling)  
(CMX608/618 Vocoder encoding  
enabled no clock throttling)  
(CMX608/618 Vocoder decoding  
enabled no clock throttling)  
(Full-duplex: CMX638 only)  
(Full-duplex: CMX638 only)  
Digital  
20.0  
38  
Digital  
Digital  
1, 9  
28  
I
I
Analogue  
Digital  
1, 10, 21  
1, 9  
10  
49  
mA  
mA  
DD  
DD  
Logic Inputs and Outputs  
Input logic '1' level  
Input logic '0' level  
Input leakage current (Vin = 0 to IOV  
Input capacitance  
Output logic '1' level (I = 2mA)  
80%  
90%  
3
20%  
±5.0  
10%  
±5  
IOV  
IOV  
µA  
pF  
IOVDD  
IOVDD  
µA  
DD  
DD  
)
DD  
1
OH  
Output logic '0' level (I = -5mA)  
"Off" state leakage current (IRQN or RDATA)  
OL  
1
3
Analogue Outputs (CMX618/CMX638 only)  
Differential output dc offset (OUT P OUT N)  
±40  
mV  
XTALin  
Input logic '1' level  
Input logic '0' level  
Input current (Vin = 0 to IOV  
70%  
30%  
±40  
IOV  
IOV  
µA  
DD  
DD  
)
DD  
XTALout  
Output logic '1' level (I = 0.5mA)  
90%  
10%  
IOVDD  
IOVDD  
OH  
Output logic '0' level (I = -1.2mA)  
OL  
2014 CML Microsystems Plc  
62  
D/608_18_38/11  
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