Audio Scrambler and Sub-Audio Signalling Processor
CMX138A
8
C-BUS Register Summary
Table 7 C-BUS Registers
ADDR.
(hex)
Word Size
REGISTER
(bits)
$01
W
C-BUS RESET
0
$A7
$A8
$A9
$AA
$AB
$AC
$AD
$AE
$AF
W
W
R
R
W
W
AuxADC and TX MOD Mode
16
16
16
16
16
16
AuxDAC Control/Data
AuxADC Data
Checksum 2 lo
System Clk PLL Data
System Clk REF
reserved
reserved
reserved
$B0
$B1
$B2
$B3
$B4
$B5
$B6
$B8
$B9
$BB
$BC
$BD
$BE
$BF
W
W
Analogue Input Gain
Analogue Output Gain
reserved
reserved
reserved
AuxADC Threshold Data
reserved
Checksum 1 hi
Checksum 1 lo
reserved
16
16
W
16
R
R
16
16
reserved
reserved
reserved
reserved
$C0
$C1
$C2
$C3
$C5
$C6
$C7
$C8
$C9
$CA
$CB
$CC
$CD
$CE
$CF
W
W
W
W
R
Power-Down Control
Mode Control
Audio Control
Tx In-band Tone
Device ID
Status
reserved
Programming
reserved
reserved
Scrambler Inversion Frequency
Tone Status
Audio Tone
Interrupt Mask
reserved
16
16
16
16
16
16
R
W
16
W
R
W
W
16
16
16
16
All other C-BUS addresses (including those not listed above) are either reserved for future use or
allocated for production testing and must not be accessed in normal operation.
© 2010 CML Microsystems Plc
Page 35
D/138A/2