1.5
General Description
The CMX018 is a single chip UHF FM/FSK double-conversion super-heterodyne receiver. It combines
a dual gain mode Low Noise Amplifier (LNA), two down-converters (including integrated oscillators),
limiting amplifier, RSSI, FM/FSK demodulator and zero-power mode control.
The receiver frequency is selected using an external PLL or synthesizer which is driven by the buffered
RF oscillator signal from the first down-converter.
The CMX018 can be used in conjunction with the CMX017, an integrated FM/FSK modulator and
transmitter, to implement a complete UHF radio link.
1.5.1
Low Noise Amplifier
The LNA includes a switched gain function which is used to increase the dynamic range of the
receiver. The gain is selected using the GAINSEL logic input at pin 2. With a logic '0' at the GAINSEL
input a high gain is selected and the amplifier achieves the lowest noise figure. This mode is used
where maximum sensitivity is required for low level input signals. Where high level signals are present
at the receiver input, which cause difficulties due to inter-modulation, the gain of the LNA can be
reduced by typically 22dB from about +16dB to about -6dB. The attenuation is selected by applying a
logic '1' at the GAINSEL input, this minimises the amount of non-linear distortion in the overall receiver
at the expense of small signal sensitivity. The input and output impedances of the LNA are typically
50
Ω
.
1.5.2
First Down-Converter
The first down-converter includes a double balanced mixer with a low noise pre-amplifier and on-chip
oscillator components. The oscillator is configured as a “high-sided” voltage controlled local oscillator,
using an external varicap diode and tank resonator circuit, such that the first IF is typically centred at
70MHz. A buffered oscillator signal (OSCOUT at pin 21) is provided to drive the frequency synthesizer
which controls the frequency tuning. The input impedance is typically 50
Ω
and the output impedance is
typically 100
Ω
.
1.5.3
Second Down-Converter
The second down-converter also includes a double balanced mixer with a low noise pre-amplifier and
on-chip oscillator components. The oscillator is configured as a “low-sided” local oscillator, using an
external crystal at typically 60MHz, such that the second IF is centred at 10.7MHz. The input
impedance is typically 100
Ω
and the output impedance is typically 430
Ω
.
1.5.4
Limiting Amplifier and RSSI
The limiting amplifier provides the IF amplification and limiting prior to the FM/FSK demodulator. An
RSSI circuit is included which has temperature compensation. An RF signal level of -100dBm at the
LNA input will produce an RSSI voltage of typically
TBD
mV. The RSSI voltage will increase with
increasing RF input level at a rate of 20mV/dB up to a typical voltage of
TBD
V at a -60dBm RF input.
In practice the absolute RSSI voltage will depend upon the insertion losses associated with each of the
IF filters. The input impedance is typically 430
Ω
.
©
1999
Consumer Microcircuits Limited
7
D/018/3
CMLMICRO [ CML MICROCIRCUITS ]
