CPC7582
the CPC7582 switches when pulled to a logic low.
Although logically disabled, if the ringing switch (SW4)
is active (closed), it will remain closed until the next
current zero crossing event.
circuit to enter the break before make state.
3. During the T low period, set the IN
and
RINGING
SD
IN
inputs to the talk state (0, 0).
TEST
4. Release T , allowing the internal pull-up to
SD
activate the break switches.
As shown in the table “Break-Before-Make Operation
for all Version (Ringing to Talk Transition)” on page 14,
this operation is similar to the one shown in
“Break-Before-Make Operation - All Versions” on
page 13, except in the method used to select the all off
When using T as an input, the two recommended
SD
states are 0 (overrides logic input pins and forces an
all off state) and float (allows switch control via logic
input pins and the thermal shutdown mechanism is
active). This requires the use of an open-collector type
buffer.
state, and in when the IN
and IN
inputs
RINGING
TEST
are reconfigured for the talk state.
1. Pull T to a logic low to end the ringing state.
SD
Forcing T to a logic high disables the thermal
SD
This opens the ringing return switch (SW3) and
prevents any other switches from closing.
shutdown circuit and is therefore not recommended as
this could lead to device damage or destruction in the
presence of excessive tip or ring potentials.
2. Keep T low for at least one-half the duration of
SD
the ringing cycle period to allow sufficient time for
a zero crossing current event to occur and for the
2.2.6 Break-Before-Make Operation for all Version (Ringing to Talk Transition)
Ringing
Return
Switches Switch
(SW3)
Ringing
Switch
(SW4)
Break
Test
Switches
IN
IN
T
SD
State
LATCH
Timing
RINGING
TEST
Ringing
All-Off
1
0
0
0
Floating
-
Off
On
On
On
Off
Off
Hold this state for at least one-half of the
ringing cycle. SW4 waiting for zero
current to turn off.
Off
Off
0
0
Break-
Before-
Make
0
0
0
0
SW4 has opened
Off
On
Off
Off
Off
Off
Off
Off
Talk
Floating
Close Break Switches
2.3 Data Latch
2.4 Thermal Shutdown
The CPC7582 has an integrated data latch. The latch
operation is controlled by logic-level input pin 11
(LATCH). The data input of the latch is pin 10
Setting T to +5 V allows switch control using the
logic inputs. This setting, however, also disables the
thermal shutdown circuit and is therefore not
SD
(IN
) and pin 9 (IN
) of the device while the
recommended. When using logic controls via the input
RINGING
TEST
output of the data latch is an internal node used for
state control. When LATCH control pin is at logic 0, the
data latch is transparent and data control signals flow
directly through to state control. A change in input will
be reflected in the switch state. When LATCH control
pin is at logic 1, the data latch is active and a change
in input control will not affect switch state. The
pins, pin 7 (T ) should be allowed to float. As a
result, the two recommended states when using pin 7
SD
(T ) as a control are 0, which forces the device to the
SD
all-off state, or float, which allows logic inputs to
remain active. This requires the use of an
open-collector type buffer.
switches will remain in the position they were in when
the LATCH changed from logic 0 to logic 1 and will not
respond to changes in input as long as the latch is at
2.5 Ringing Switch Zero-Cross Current Turn Off
After the application of a logic input to turn SW4 off,
the ringing switch is designed to delay the change in
state until the next zero-crossing. Once on, the switch
requires a zero-current cross to turn off, and therefore
should not be used to switch a pure DC signal. The
logic 1. The T input is not tied to the data latch.
SD
Therefore, T is not affected by the LATCH input and
SD
the T input will override state control.
SD
14
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