CS8904
Crystal LAN™ Quad Ethernet Transceiver
2.1 Controller Interface
DUPSEL[0:3] - Duplex Select. Input, Pins 3, 77, 53, and 27.
When AUTOSEL is low, setting this pin high will force the port into full duplex operation and
setting this pin low will force the port into half duplex operation. When AUTOSEL is high,
setting this pin high indicates that full and half duplex capability should be advertised, and
setting this pin low indicates that only half duplex capability should be advertised.
AUTOSEL[0:3] - Auto-Negotiation Select. Input, Pins 4, 76, 54, and 26.
Setting this pin high will cause the port to Auto-Negotiate, automatically selecting half or full
duplex operation. When low, Auto-Negotiation is disabled and the duplex of the port is
controlled by the DUPSEL pin.
LOOP[0:3] - Port Loopback Enable. Input, Pins 5, 75, 55, and 25.
Port Loopback Enable: Setting this pin high will cause the input data on the TxDATA pin for
this port to appear on the RxDATA pin for this port. Tx+ and Tx- will remain idle and any data
received on Rx+ and Rx- will be ignored. Setting this pin low will result in normal operation of
the port.
TxENBL[0:3] - Transmit Enable. Input, Pins 2, 78, 52, and 28.
Transmit Enable: When this pin is asserted, the input data for this port, present on the TxDATA
pin, is input to the CS8904 using the transmit clock, TxCLK. When this pin is deasserted, Tx+
and Tx- output pins are idle.
TxDATA[0:3] - Transmit Data. Input, Pins 1, 79, 51, and 29.
The data to be transmitted is presented on this pin using NRZ encoding and synchronized by
the transmit clock, TxCLK. Data is accepted when TxENBL is high.
TxCLK - Transmit Clock. Output with 4 mA drive, Pin 42.
Common transmit clock for all four ports. TxENBL is used to control the sampling of TxDATA
using TxCLK.
COLL[0:3] - Collision Detect Status. Output with 4 mA drive, Pins 98, 82, 48, and 32.
This output pin will assert to indicate that a collision has been detected on this port and
deasserts when the collision is no longer present. When operating in full duplex mode,
collisions will not occur and COLL will not transition.
CD[0:3] - Carrier Detect Status. Output with 4 mA drive, Pins 99, 81, 49, and 31.
This output pin is asserted while receive data is available on the RxDATA pin for this port.
DUPLEX[0:3] - Duplex Status. Output with 4 mA drive, Pins 93, 87, 43, and 37.
This output remains high when the port is operating full duplex, and remains low when the port
is operating half duplex.
CIRRUS LOGIC ADVANCED PRODUCT DATABOOK
8
DS191PP2
CIRRUS [ CIRRUS LOGIC ]
