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CS8900A-IQZ 参数 Datasheet PDF下载

CS8900A-IQZ图片预览
型号: CS8900A-IQZ
PDF下载: 下载PDF文件 查看货源
内容描述: 水晶局域网? ISA以太网控制器 [Crystal LAN ⑩ ISA Ethernet Controller]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路PC局域网以太网时钟
文件页数/大小: 138 页 / 2374 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS8900A  
Crystal LAN™ Ethernet Controller  
001000  
These bits provide an internal address used by the CS8900A to identify this as the Transmitter  
Event Register.  
Loss-of-CRS  
If the CS8900A is transmitting on the AUI and doesn't see Carrier Sense (CRS) at the end of  
the preamble, there is a Loss-of-Carrier error and this bit is set. If Loss-of-CRSiE (Register 7,  
TxCFG, Bit 6) is set, there is an interrupt.  
SQEerror  
TxOK  
At the end of a transmission on the AUI, the CS8900A expects to see a collision within 64 bit  
times. If this does not happen, there is an SQE error and this bit is set. If SQEerroriE (Register  
7, TxCFG, Bit 7) is set, there is an interrupt.  
This bit is set if the last packet was completely transmitted (Jabber (Bit A), out-of-window-colli-  
sion (Bit 9), and 16Coll (Bit F) must all be clear). If TxOKiE (Register 7, TxCFG, Bit 8) is set,  
there is an interrupt.  
Out-of-Window  
Jabber  
This bit is set if a collision occurs more than 512 bit times after the first bit of the preamble. When  
this occurs, the CS8900A forces a bad CRC and terminates the transmission. If Out-of-window-  
iE (Register 7, TxCFG, Bit 9) is set, there is an interrupt  
If the last transmission is longer than 26 msec, then the packet output is terminated by the jab-  
ber logic and this bit is set. If JabberiE (Register 7, TxCFG, Bit A) is set, there is an interrupt.  
#-of-TX-collisions These bits give the number of transmit collisions that occurred on the last transmitted packet.  
Bit B is the LSB. If AnycolliE (Register 7, TxCFG, Bit B) is set, there is an interrupt when any  
collision occurs.  
16coll  
This bit is set if the CS8900A encounters 16 normal collisions while attempting to transmit a  
particular packet. When this happens, the CS8900A stops further attempts to send that packet.  
If 16colliE (Register 7, TxCFG, Bit F) is set, there is an interrupt.  
Reset value is: 0000 0000 0000 1000  
Notes:  
1.In any event register, like TxEvent, all bits are cleared upon readout. The host is responsible for  
processing all event bits.  
2.TxOK (Bit 8) and the Number-of-Tx-Collisions (Bits E-B) are used in normal packet transmission.All  
other bits (6, 7, 9, A, and F) give the status of abnormal transmit operation.  
4.4.11 Register 9: Transmit Command Status  
(TxCMD, Read-only, Address: PacketPage base + 0108h)  
7
6
5
4
3
2
1
0
TxStart  
001001  
F
E
D
C
B
A
9
8
TxPadDis  
InhibitCRC  
Onecoll  
Force  
This register contains the latest transmit command which tells the CS8900A how the next packet should be sent.  
The command must be written to PacketPage base + 0144h in order to initiate a transmission. The host can read  
the command from register 9 (PacketPage base + 0108h). See Section 5.6 on page 99.  
001001  
These bits provide an internal address used by the CS8900A to identify this as the Transmit  
Command Register. When reading this register, these bits will be 001001, where the LSB cor-  
responds to Bit 0.  
TxStart  
This pair of bits determines how many bytes are transferred to the CS8900A before the MAC  
starts the packet transmit process.  
CIRRUS LOGIC PRODUCT DATASHEET  
DS271F4  
58  
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