CS8900A
Crystal LAN™ ISA Ethernet Controller
4.5 Initiate Transmit Registers
4.5.1 Transmit Command Request - TxCMD
(Write-only, Address: PacketPage base + 0144h)
7
6
5
4
3
2
1
0
TxStart
001001
F
E
D
C
B
A
9
8
TxPadDis
InhibitCRC
Onecoll
Force
The word written to PacketPage base + 0144h tells the CS8900A how the next packet should be transmitted. This
PacketPage location is write-only, and the written word can be read from Register 9, at PacketPage base + 0108h.
The CS8900A does not transmit a frame if TxLength (at PacketPage location base + 0146h) is less than 3. See
Section 5.7 on page 99.
001001
These bits provide an internal address used by the CS8900A to identify this as the Transmit
Command Register. When reading this register, these bits will be 001001, where the LSB cor-
responds to Bit 0.
TxStart
This pair of bits determines how many bytes are transferred to the CS8900A before the MAC
starts the packet transmit process.
Bit 7 Bit 6
0
0
1
1
0
1
0
Start transmission after 5 bytes are in the CS8900A
Start transmission after 381 bytes are in the CS8900A
Start transmission after 1021 bytes are in the CS8900A
Start transmission after the entire frame is in the CS8900A
1
Force
When set in conjunction with a new transmit command, any transmit frames waiting in the trans-
mit buffer are deleted. If a previous packet has started transmission, that packet is terminated
within 64 bit times with a bad CRC.
Onecoll
When this bit is set, any transmission will be terminated after only one collision. When clear, the
CS8900A allows up to 16 normal collisions before terminating the transmission.
InhibitCRC
TxPadDis
When set, the CRC is not appended to the transmission.
When TxPadDis is clear, if the host gives a transmit length less than 60 bytes and InhibitCRC
is set, then the CS8900A pads to 60 bytes. If the host gives a transmit length less than 60 bytes
and InhibitCRC is clear, then the CS8900A pads to 60 bytes and appends the CRC.
When TxPadDis is set, the CS8900A allows the transmission of runt frames (a frame less than
64 bytes). If InhibitCRC is clear, the CS8900A appends the CRC. If InhibitCRC is set, the
CS8900A does not append the CRC.
Since this register is write-only, it’s initial state after reset is undefined.
4.5.2 Transmit Length
(Write-only, Address: PacketPage base + 0146h)
Address 0147h
Most-significant byte of Transmit Frame Length
Address 0146h
Least-significant byte of Transmit Frame Length
This register is used in conjunction with register 9, TxCMD. When a transmission is initiated via a command in Tx-
CMD, the the length of the transmitted frame is written into this register. The length of the transmitted frame may be
modified by the configuration of the TxPadDis and InhibitCRC bits in the TxCMD register. See Table 35, and
Section 5.7 on page 99. TxLength must be >3 and < 1519.
Since this register is write-only, it’s initial state after reset is undefined.
CIRRUS LOGIC PRODUCT DATA SHEET
DS271PP3
71
CIRRUS [ CIRRUS LOGIC ]
