CS8900A
Crystal LAN™ ISA Ethernet Controller
4.4.14 Register 10: Receiver Miss Counter
(RxMISS, Read-only, Address: PacketPage base + 0130h)
7
6
5
4
3
2
1
9
0
8
MissCount
010000
F
E
D
C
B
A
MissCount
The RxMISS counter (Bits 6 through F) records the number of receive frames that are lost (missed) due to the lack
of available buffer space. If the MissOvfloiE bit (Register B, BufCFG, Bit D) is set, there is an interrupt when RxMISS
increments from 1FFh to 200h. This interrupt provides the host with an early warning that the RxMISS counter should
be read before it reaches 3FFh and starts over (by interrupting at 200h, the host has an additional 512 counts before
RxMISS actually overflows). The RxMISS counter is cleared when read.
010000
These bits provide an internal address used by the CS8900A to identify this as the Receiver
Miss Counter. When reading this register, these bits will be 010000, where the LSB corre-
sponds to Bit 0.
MissCount
The upper ten bits contain the number of missed frames.
Register’s value is: 0000 0000 0001 0000
CIRRUS LOGIC PRODUCT DATA SHEET
DS271PP3
61
CIRRUS [ CIRRUS LOGIC ]
