CS8900A
Crystal LAN™ ISA Ethernet Controller
4.4.8 Register 5: Receiver Control
(RxCTL, Read/Write, Address: PacketPage base +0104h)
7
6
5
4
3
2
1
0
PromiscuousA
IAHashA
000101
F
E
D
C
B
A
9
8
ExtradataA
RuntA
CRCerrorA
BroadcastA
IndividualA
MulticastA
RxOKA
RxCTL has two functions: Bits 8, C, D, and E define what types of frames to accept. Bits 6, 7, 9, A, and B configure
the Destination Address filter. See Section 5.3 on page 87.
000101
These bits provide an internal address used by the CS8900A to identify this as the Receiver
Control Register. For a received frame to be accepted, the Destination Address of that frame
must pass the filter criteria found in Bits 6, 7, 9, A, and B (see Section 5.3 on page 87).
IAHashA
When set, receive frames are accepted when the Destination Address is an Individual Address
that passes the hash filter.
PromiscuousA
RxOKA
Frames with any address are accepted when this bit is set.
When set, the CS8900A accepts frames with correct CRC and valid length (valid length is: 64
bytes <= length <= 1518 bytes).
MulticastA
IndividualA
When set, receive frames are accepted if the Destination Address is an Multicast Address that
passes the hash filter.
When set, receive frames are accepted if the Destination Address matches the Individual Ad-
dress found at PacketPage base + 0158h to PacketPage base + 015Dh.
BroadcastA
CRCerrorA
When set, receive frames are accepted if the Destination Address is FFFF FFFF FFFFh.
When set, receive frames that pass the Destination Address filter, but have a bad CRC, are ac-
cepted. When clear, frames with bad CRC are discarded. See Note 5.
RuntA
When set, receive frames that are smaller than 64 bytes, and that pass the Destination Address
filter are accepted. When clear, received frames less that 64 bytes in length are discarded. The
CS8900A discards any frame that is less than 8 bytes. See Note 5.
ExtradataA
When set, receive frames longer than 1518 bytes and that pass the Destination Address filter
are accepted. The CS8900A accepts only the first 1518 bytes and ignores the rest. When clear,
frames longer than 1518 bytes are discarded. See Note 5.
After reset, if no EEPROM is found by the CS8900A, then the register has the following initial state. If an EEPROM
is found, then the register’s initial value may be set by the EEPROM. See Section 5.3 on page 87.
Reset value is: 0000 0000 0000 0101
Notes: 5. Typically, when bits CRCerrorA, RuntA and ExtradataA are cleared (meaning bad frames are being
discarded), then the corresponding bits CRCerroriE, RuntiE and ExtradataiE should be set in register 3
(Receiver Configuration register) to allow the device driver to keep track of discarded frames.
CIRRUS LOGIC PRODUCT DATA SHEET
DS271PP3
55
CIRRUS [ CIRRUS LOGIC ]
