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CS8900A-IQ 参数 Datasheet PDF下载

CS8900A-IQ图片预览
型号: CS8900A-IQ
PDF下载: 下载PDF文件 查看货源
内容描述: 水晶局域网? ISA以太网控制器 [Crystal LAN ⑩ ISA Ethernet Controller]
分类和应用: 控制器局域网以太网
文件页数/大小: 128 页 / 1360 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS8900A  
Crystal LAN™ ISA Ethernet Controller  
1.0 INTRODUCTION  
1.1 General Description  
transmission on collision, and automatic padding  
of transmitted frames.  
The CS8900A is a true single-chip, full-duplex,  
Ethernet solution, incorporating all of the analog  
and digital circuitry needed for a complete Ethernet  
circuit. Major functional blocks include: a direct  
ISA-bus interface; an 802.3 MAC engine; integrat-  
ed buffer memory; a serial EEPROM interface; and  
a complete analog front end with both 10BASE-T  
and AUI.  
1.1.4 EEPROM Interface  
The CS8900A provides a simple and efficient seri-  
al EEPROM interface that allows configuration in-  
formation to be stored in an optional EEPROM,  
and then loaded automatically at power-up. This  
eliminates the need for costly and cumbersome  
switches and jumpers.  
1.1.5 Complete Analog Front End  
1.1.1 Direct ISA-Bus Interface  
The CS8900A’s analog front end incorporates a  
Manchester encoder/decoder, clock recovery cir-  
cuit, 10BASE-T transceiver, and complete Attach-  
ment Unit Interface (AUI). It provides manual and  
automatic selection of either 10BASE-T or AUI,  
and offers three on-chip LED drivers for link sta-  
tus, bus status, and Ethernet line activity.  
Included in the CS8900A is a direct ISA-bus inter-  
face with full 24 mA drive capability. Its configu-  
ration options include a choice of four interrupts  
and three DMA channels (one of each selected dur-  
ing initialization). In Memory Mode, it supports  
Standard or Ready Bus cycles without introducing  
additional wait states.  
The 10BASE-T transceiver includes drivers, re-  
ceivers, and analog filters, allowing direct connec-  
tion to low-cost isolation transformers. It supports  
100, 120, and 150 Ω shielded and unshielded ca-  
bles, extended cable lengths, and automatic receive  
polarity reversal detection and correction.  
1.1.2 Integrated Memory  
The CS8900A incorporates a 4-Kbyte page of on-  
chip memory, eliminating the cost and board area  
associated with external memory chips. Unlike  
most other Ethernet controllers, the CS8900A buff-  
ers entire transmit and receive frames on chip,  
eliminating the need for complex, inefficient mem-  
ory management schemes. In addition, the  
CS8900A operates in either Memory space, I/O  
space, or with external DMA controllers, providing  
maximum design flexibility.  
The AUI port provides a direct interface to  
10BASE-2, 10BASE-5 and 10BASE-FL networks,  
and is capable of driving a full 50-meter AUI cable.  
1.2 System Applications  
The CS8900A is designed to work well in either  
motherboard or adapter applications.  
1.1.3 802.3 Ethernet MAC Engine  
1.2.1 Motherboard LANs  
The CS8900A’s Ethernet Media Access Control  
(MAC) engine is fully compliant with the IEEE  
802.3 Ethernet standard (ISO/IEC 8802-3, 1993),  
and supports full-duplex operation. It handles all  
aspects of Ethernet frame transmission and recep-  
tion, including: collision detection, preamble gen-  
eration and detection, and CRC generation and test.  
Programmable MAC features include automatic re-  
The CS8900A requires the minimum number of  
external components needed for a full Ethernet  
node. Its small-footprint package and high level of  
integration allow System Engineers to design a  
complete Ethernet circuit that occupies as little as  
1.5 square inches of PCB area (Figure 1). In addi-  
tion, the CS8900A’s power-saving features and  
CMOS design make it a perfect fit for power-sensi-  
CIRRUS LOGIC PRODUCT DATA SHEET  
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DS271PP3  
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