CS8900A
Crystal LAN™ ISA Ethernet Controller
’C46 or ’CS46. If EEDI is high, the EEPROM is a
’C56, ’CS56, ’C66, or ’CS66.
stored to its default. Once initialization is complete
(configuration loaded from EEPROM or reset to
default configuration) the INITD bit is set (Register
16, SelfST, bit 7).
3.4.7.2 Loading Configuration Data
The CS8900A reads in the first word from the EE-
PROM to determine if configuration data is con-
tained in the EEPROM. If configuration data is not
stored in the EEPROM, the CS8900A terminates
initialization from EEPROM and operates using its
default configuration (See Table 3). If configura-
tion data is stored in EEPROM, the CS8900A auto-
matically loads all configuration data stored in the
Reset Configuration Block into its internal Pack-
etPage registers.
3.5 Programming the EEPROM
After initialization, the host can access the EE-
PROM through the CS8900A by writing one of
seven commands to the EEPROM Command regis-
ter (PacketPage base + 0040h). Figure 5 shows the
format of the EEPROM Command register.
3.5.1 EEPROM Commands
The seven commands used to access the EEPROM
are: Read, Write, Erase, Erase/Write Enable,
Erase/Write Disable, Erase-All, and Write-All.
They are described in Table 7.
3.4.8 EEPROM Read-out Completion
Once all the configuration data are transferred to
the appropriate PacketPage registers, the CS8900A
performs a checksum calculation to verify the Re-
set Configuration Blocks data are valid. If the re-
sulting total is 0, the read-out is considered valid.
Otherwise, the CS8900A initiates a partial reset to
restore the default configuration.
3.5.2 EEPROM Command Execution
During the execution of a command, the two Op-
code bits, followed by the six bits of address (for a
’C46 or ’CS46) or eight bits of address (for a ’C56,
’CS56, ’C66 or ’CS66), are shifted out of the
CS8900A, into the EEPROM. If the command is a
Write, the data in the EEPROM Data register
(PacketPage base + 0042h) follows. If the com-
mand is a Read, the data in the specified EEPROM
If the read-out is valid, the EEPROMOK bit (Reg-
ister 16, SelfST, bit A) is set. EEPROMOK is
cleared if a checksum error is detected. In this case,
the CS8900A performs a partial reset and is re-
AD7 - AD0 used with ’C56,
’CS56, ’C66 and ’CS66
F
X
E
X
D
X
C
X
B
X
A
9
8
7
6
5
4
3
2
1
0
ELSEL OP1 OP0 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
AD5 - AD0 used with
’C46 and ’CS46
Bit
[F:B]
[A]
Name
Description
Reserved
ELSEL
External Logic Select: When clear, the EECS pin is used to select the EEPROM.
When set, the ELCS pin is used to select the external LA decode circuit.
[9:8]
[7:0]
OP1, OP0
Opcode: Indicates what command is being executed (see next section).
AD7 to AD0 EEPROM Address: Address of EEPROM word being accessed.
Figure 5. EEPROM Command Register Format
CIRRUS LOGIC PRODUCT DATA SHEET
24
DS271PP3