CS6422
CS6422
STROBE pulses must be applied to latch the data
into the CS6422.
3.2.2 Register Definitions
The six control registers accessible through the
MCR are described in detail in the following tables.
These registers are addressed by bits b3-0 of the
MCR. Bit ‘b0’ must always be ‘0’. Table 2 shows
the register map with the default settings. Tables 3
through 8 show the control registers in more detail.
Since the MCR is a shift register, the STROBE can
be run arbitrarily slowly with a duty cycle limited
only by the minimum high and low time specified
in “Switching Characteristics”. The Microcontrol-
ler Interface is polled at 125 µs intervals, so regis-
ter writes must be spaced at least 125 µs apart or
the register contents may be overwritten.
The Register Map at the top of each register de-
scription shows the names of all the bits, with their
reset values below the bitfield name. The reset val-
ue can also be found in the Word column of the bit-
field summary as indicated by an ‘*’.
four extra strobe pulses
1
2
3
4
STROBE
DATA
DRDY
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Figure 7. Microcontroller Interface
#
0
b15
Mic HDD
1
b14
b13
b12
b11
b10
b9
b8
b7
TSD
0
RSD
0
b6
b5
b4
TSMde
0
AuNECD 0010
0
IdlTx
0
b3-0
0000
GB
10
RVol
ACC
00
NCC
00
0
0100
TVol
1010
1
2
3
4
5
THDet
Taps
10
RSThd
00
00
RHDet
00
TSAtt
00
NseRmp
00
TDbtS
000
NErle
00
HDly
00
RDbtS
00
NFNse
00
HHold TDSRmp RDSRmp
0100
0110
1000
1010
0
0
0
PCSen
TSThd
00
RGain
00
TSBias
0
00
TGain
00
NSdt
00
AErle
00
AFNse
00
HwlD TD APCD NPCD APFD NPFD AECD NECD
0
ASdt
00
0
0
0
0
0
0
0
Table 2. MCR Control Register Mapping
13
13
DS295F1
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