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CS5460A-BS 参数 Datasheet PDF下载

CS5460A-BS图片预览
型号: CS5460A-BS
PDF下载: 下载PDF文件 查看货源
内容描述: 单相双向功率/电能IC [Single Phase Bi-Directional Power/Energy IC]
分类和应用:
文件页数/大小: 54 页 / 879 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS5460A  
to V*, I*, P*, E* Registers  
+
+
2
SINC2  
Filter  
V
*
In  
Modulator  
x
N
÷
N
+
X
+
-
X
RMS  
+
N
DC Offset*  
Gain*  
AC Offset*  
Σ
2
X
1
x
÷
N
-X  
0.6  
x
* Denotes readable/writable register  
Figure 18. Calibration Data Flow  
pins of the voltage/current channels to their ground  
reference level. (See Figure 17.)  
following descriptions of calibration sequences will  
focus on the voltage channel, but apply equally to  
the current channel.  
Offset and gain calibration cannot be done at the  
same time. This will cause undesirable calibration  
results.  
Note: For proper calibration, it is assumed that the value  
of the Voltage-/Current-Channel Gain Registers  
are set to default (1.0) before running the gain  
calibration(s), and the value in the  
External  
Connections  
Voltage-/Current Channel AC and DC Offset  
Registers is set to default (0) before running  
calibrations. This can be accomplished by a  
software or hardware reset of the device. The  
values in the voltage/current calibration registers  
do affect the results of the calibration sequences.  
+
-
+
-
AIN+  
AIN-  
Full Scale  
+
-
XGAIN  
(DC or AC)  
+
-
CM  
3.8.7.1 AC Offset Calibration Sequence  
The idea of the AC offset calibration is to obtain an  
offset value that reflects the square of the RMS  
output level when the inputs are grounded. During  
normal operation, when the CS5460A is calculat-  
ing the latest result for the RMS Voltage Register,  
this AC offset register value will be subtracted from  
the square of each successive voltage sample in  
order to nullify the AC offset that may be inherent  
in the voltage-channel signal path. Note that the  
value in the AC offset register is proportional to the  
square of the AC offset.  
Figure 16. System Calibration of Gain.  
External  
Connections  
+
-
+
-
AIN+  
+
-
0V  
XGAIN  
AIN-  
+
-
CM  
Figure 17. System Calibration of Offset.  
First, the inputs are grounded, and then the AC off-  
set calibration command is sent to the CS5460A.  
When the AC offset calibration sequence is initiat-  
ed, a valid RMS Voltage Register value is acquired  
and squared. This value is then subtracted from  
the square of each voltage sample that comes  
through the RMS data path. See Figure 18.  
3.8.7 Description of Calibration Algo-  
rithms  
The computational flow of the CS5460A’s AC and  
DC gain/offset calibration sequences are illustrat-  
ed in Figure 18. This figure applies to both the volt-  
age channel and the current channel. The  
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