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CS4351-CZZ 参数 Datasheet PDF下载

CS4351-CZZ图片预览
型号: CS4351-CZZ
PDF下载: 下载PDF文件 查看货源
内容描述: 192 kHz立体声DAC 2 Vrms的线路输出 [192 kHz STEREO DAC WITH 2 Vrms LINE OUT]
分类和应用: 转换器数模转换器光电二极管
文件页数/大小: 41 页 / 1097 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS4351  
does not encounter a zero crossing. The zero cross function is independently monitored and implemented  
for each channel.  
Soft Ramp PCM  
Soft Ramp allows level changes, both muting and attenuation, to be implemented by incrementally ramp-  
ing, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per 8 left/right clock periods.  
Soft Ramp and Zero Cross  
Soft Ramp and Zero Cross Enable dictate that signal level changes, either by attenuation changes or mut-  
ing, will occur in 1/8 dB steps and be implemented on a signal zero crossing. The 1/8 dB level change will  
occur after a time-out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample  
rate) if the signal does not encounter a zero crossing. The zero cross function is independently monitored  
and implemented for each channel.  
6.6.2 SOFT VOLUME RAMP-UP AFTER ERROR (RMP_UP) BIT 5  
Function:  
When set to 1 (default), an un-mute will be performed after executing a filter mode change, after a  
LRCK/MCLK ratio change or error, and after changing the Functional Mode. This un-mute is affected,  
similar to attenuation changes, by the Soft and Zero Cross bits in the Volume and Mixing Control register.  
When set to 0, an immediate un-mute is performed in these instances.  
Note: for best results, it is recommended that this feature be used in conjunction with the RMP_DN bit.  
6.6.3 SOFT RAMP-DOWN BEFORE FILTER MODE CHANGE (RMP_DN) BIT 4  
Function:  
When set to 1 (default), a mute will be performed prior to executing a filter mode change. This mute is  
affected, similar to attenuation changes, by the Soft and Zero Cross bits in the Volume and Mixing Control  
register.  
When set to 0, an immediate mute is performed prior to executing a filter mode change.  
Note: for best results, it is recommended that this feature be used in conjunction with the RMP_UP bit.  
6.6.4 INTERPOLATION FILTER SELECT (FILT_SEL) BIT 2  
Function:  
When set to 0 (default), the Interpolation Filter has a fast roll off.  
When set to 1, the Interpolation Filter has a slow roll off.  
The specifications for each filter can be found in the “Combined Interpolation & On-chip Analog Filter Re-  
sponse” on page 9, and response plots can be found in figures 15 to 36.  
DS566PP2  
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