Confidential Draft
3/11/08
CS4334/5/8/9
LIST OF TABLES
PIN DESCRIPTIONS
SERIAL DATA INPUT
DE-EMPHASIS / SCLK
LEFT / RIGHT CLOCK
MASTER CLOCK
SDATA
DEM/SCLK
LRCK
MCLK
1
2
3
4
8
7
6
5
AOUTL
VA
AGND
AOUTR
ANALOG LEFT CHANNEL OUTPUT
ANALOG POWER
ANALOG GROUND
ANALOG RIGHT CHANNEL OUTPUT
No.
1
2
3
4
5
6
7
8
Pin Name
SDATA
DEM/SCLK
LRCK
MCLK
AOUTR
AGND
VA
AOUTL
I/O
I
I
I
I
O
I
I
O
Pin Function and Description
Serial Audio Data Input
- Two’s complement MSB-first serial data is input on this pin. The data is
clocked into the CS4334/5/8/9 via internal or external SCLK, and the channel is determined by
LRCK.
De-Emphasis/External Serial Clock Input
- Used for de-emphasis filter control or external serial
clock input.
Left/Right Clock
- Determines which channel is currently being input on the Audio Serial Data
Input pin, SDATA.
Master Clock
- Frequency must be 256x, 384x, or 512x the input sample rate in BRM and either
128x or 192x the input sample rate in HRM.
Analog Right Channel Output
- Typically 3.5 Vp-p for a full-scale input signal.
Analog Ground
- Analog ground reference is 0V.
Analog Power
- Analog power supply is nominally +5 V.
Analog Left Channel Output
- Typically 3.5 Vp-p for a full-scale input signal.
DS248F5
3
CIRRUS [ CIRRUS LOGIC ]
