欢迎访问ic37.com |
会员登录 免费注册
发布采购

CS4297A-JQEP 参数 Datasheet PDF下载

CS4297A-JQEP图片预览
型号: CS4297A-JQEP
PDF下载: 下载PDF文件 查看货源
内容描述: [Consumer Circuit, PQFP48, 9 X 9 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, MS-022, TQFP-48]
分类和应用: 解码器编解码器
文件页数/大小: 46 页 / 897 K
品牌: CIRRUS [ CIRRUS LOGIC ]
 浏览型号CS4297A-JQEP的Datasheet PDF文件第23页浏览型号CS4297A-JQEP的Datasheet PDF文件第24页浏览型号CS4297A-JQEP的Datasheet PDF文件第25页浏览型号CS4297A-JQEP的Datasheet PDF文件第26页浏览型号CS4297A-JQEP的Datasheet PDF文件第28页浏览型号CS4297A-JQEP的Datasheet PDF文件第29页浏览型号CS4297A-JQEP的Datasheet PDF文件第30页浏览型号CS4297A-JQEP的Datasheet PDF文件第31页  
CS4297  
CrystalClear™ SoundFusion™ Audio Codec ’97  
Powerdown Control/Status Register (Index 26h)  
D15  
D14  
D13  
D12  
D11  
D10  
D9  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
0
PR6  
PR5  
PR4  
PR3  
PR2  
PR1  
PR0  
0
0
0
0
REF  
ANL DAC ADC  
The bits in this register correspond to the AC’97 defined powerdown and status functions. See the follow-  
ing tables for the definitions of the individual bits which the CS4297 supports.  
Bit Name  
Function  
REF  
ANL  
Vref at nominal levels  
Analog Mixers, Mux, and Vol-  
ume Controls ready  
DAC  
ADC  
DAC ready to accept data  
ADC ready to transmit data  
Table 6. Codec Powerdown Status Bits  
Bit Name  
Function  
PR0  
PR1  
PR2  
PR3  
PR4  
PR5  
PR6  
ADCs and Input Mux Powerdown  
DACs Powerdown  
Analog Mixer Powerdown (Vref still on)  
Analog Mixer Powerdown (Vref off)  
AC-Link Powerdown (BIT_CLK off)  
Internal Clock Disable  
Alternate Line Output Buffer Powerdown  
Table 7. Codec Powerdown Control Bits  
Reserved Registers (Index 28h - 58h)  
These registers are reserved for future use by the AC’97 specification. The CS4297 ignores writes to these  
registers.  
Crystal Revision and Fab ID Register (Index 5Ah)  
D15  
D14  
D13  
D12  
D11  
D10  
D9  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
1
This vendor reserved register is being used by the CS4297 to indicate the revision level of the CS4297 as  
well as the Fab ID where the part was manufactured. This is in addition to the Vendor ID registers located  
below. The revision level is indicated in bits D11:8 and will be 03h for the release revision of the chip.  
The Fab ID is indicated in bits D3:0 and will be 01h.  
DS242F5  
27  
 复制成功!