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CS42432_06 参数 Datasheet PDF下载

CS42432_06图片预览
型号: CS42432_06
PDF下载: 下载PDF文件 查看货源
内容描述: 108分贝192千赫4入, 6出TDM CODEC [108 dB, 192 kHz 4-In, 6-Out TDM CODEC]
分类和应用:
文件页数/大小: 59 页 / 1051 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS42432  
2. PIN DESCRIPTIONS - HARDWARE MODE  
52 51 50 49 48 47 46 45 44 43 42 41 40  
TEST  
TEST  
AIN1+  
AIN1-  
VA  
39  
38  
1
2
MFREQ  
TEST  
3
37  
36  
35  
34  
33  
VQ  
4
AGND  
TSTO  
TSTO  
TSTO  
TSTO  
AOUT6-  
AOUT6+  
AOUT5+  
RST  
VLC  
5
6
FS  
7
42432  
VD  
8
32  
31  
30  
29  
28  
27  
DGND  
VLS  
9
10  
11  
12  
SCLK  
MCLK  
ADC_SDOUT 13  
AOUT5-  
14 15 16 17 18 19 20 21 22 23 24 25 26  
Pin Name  
SCL/CCLK  
#
1
2
Pin Description  
Serial Control Port Clock (Input) - Serial clock for the control port interface.  
SDA/CDOUT  
AD0/CS  
Serial Control Data I/O (Input/Output) - Input/Output for I²C data. Output for SPI data.  
Address Bit [0]/ Chip Select (Input) - Chip address bit in I²C Mode. Control signal used to select  
3
4
5
the chip in SPI Mode.  
AD1/CDIN  
RST  
Address Bit [1]/ SPI Data Input (Input) - Chip address bit in I²C Mode. Input for SPI data.  
Reset (Input) - The device enters a low-power mode and all internal registers are reset to their  
default settings when low.  
Control Port Power (Input) - Determines the required signal level for the control port interface.  
See “Digital I/O Pin Characteristics” on page 8.  
VLC  
6
FS  
7
8
Frame Sync (Input) - Signals the start of a new TDM frame in the TDM digital interface format.  
Digital Power (Input) - Positive power supply for the digital section.  
VD  
DGND  
9,18 Digital Ground (Input) - Ground reference for the digital section.  
Serial Port Interface Power (Input) - Determines the required signal level for the serial port inter-  
faces. See “Digital I/O Pin Characteristics” on page 8.  
VLS  
10  
SCLK  
11  
Serial Clock (Input) - Serial clock for the serial audio interface. Input frequency must be 256 x Fs.  
MCLK  
12 Master Clock (Input) - Clock source for the delta-sigma modulators and digital filters.  
13 Serial Audio Data Output (Output) - TDM output for two’s complement serial audio data.  
14 DAC Serial Audio Data Input (Input) - TDM Input for two’s complement serial audio data.  
ADC_SDOUT  
DAC_SDIN  
Auxiliary Left/Right Clock (Output) - Determines which channel, Left or Right, is currently active  
on the Auxiliary serial audio data line.  
AUX_LRCK  
AUX_SCLK  
15  
16 Auxiliary Serial Clock (Output) - Serial clock for the Auxiliary serial audio interface.  
DS673F1  
9