CS42418
8. APPENDIX A: EXTERNAL FILTERS
8.1
ADC Input Filter
The analog modulator samples the input at 6.144 MHz (internal MCLK=12.288 MHz). The digital filter will
reject signals within the stopband of the filter. However, there is no rejection for input signals which are
(n × 6.144 MHz) the digital passband frequency, where n=0,1,2,... Refer to Figure 24 for a recommended
analog input buffer that will attenuate any noise energy at 6.144 MHz, in addition to providing the optimum
source impedance for the modulators. The use of capacitors that have a large voltage coefficient (such as
general-purpose ceramics) must be avoided since these can degrade signal linearity.
634
Ω
470 pF
C0G
-
91
Ω
100 µF
AINL1+
AINL1-
+
634
Ω
AINL
634
Ω
2700 pF
C0G
100 kΩ
470 pF
C0G
VA
10 kΩ
91
Ω
2.8 kΩ
-
+
332
634
Ω
0.1 µF
100 µF
3.32 kΩ
Ω
470 pF
C0G
-
91
Ω
100 µF
AINR1+
AINR1-
+
AINR
634
Ω
634
Ω
2700 pF
C0G
100 kΩ
470 pF
C0G
VA
10 kΩ
91
Ω
2.8 kΩ
-
+
332
Ω
0.1 µF
100 µF
3.32 kΩ
Figure 24. Recommended Analog Input Buffer
8.2
DAC Output Filter
The CS42418 is a linear phase design and does not include phase or amplitude compensation for an exter-
nal filter. Therefore, the DAC system phase and amplitude response will be dependent on the external an-
alog circuitry.
1800 pF
6.19 kΩ
390 pF
C0G
C0G
5.49 kΩ
2.94 kΩ
887 Ω
22 µF
-
AOUT -
AOUT +
1 k Ω
Analog
Out
+
47.5 k Ω
1200 pF
C0G
1.65 kΩ
5800 pF
1.87 kΩ
22 µF
C0G
Figure 25. Recommended Analog Output Buffer
DS603F1
61
CIRRUS [ CIRRUS LOGIC ]
