CS4216
OUTPUT DATA BIT DEFINITIONS
Sub-frame Bits 25 to 32
Sub-frame Bits 1 to 16
25
26
27
28
29
30
31
32
ER3 ER2 ER1 ER0 Ver3 Ver2 Ver1 Ver0
Left ADC Audio Data, MSB first, 2’s comple-
ment coded.
ER3-ER0 Error Word
0000 - Normal – No errors.
0001 - Input Sub-frame Bit 21 is set.
Control data will not be loaded
0010 - Sync Pulse is incorrect.
Causes the analog output to mute.
0011 - SCLK is outside the allowable
range. Analog output mutes.
Sub-frame Bits 17 to 24
17
18
19
20
21
22
23
24
Ver3-Ver0
CS4216 Version Number
0000 = "A" (see Appendix A)
RESERVED
0
ADV LCL RCL
ADV
ADC Valid data bit.
0 - Invalid ADC data
1 - Valid ADC data
0001 = "B", "C", . . . (This data sheet)
Sub-frame Bits 33 to 48
Indicates ADC has completed initialization
after power-up, low power mode,
or mute.
Right ADC Audio Data, MSB first, 2’s comple-
ment coded.
LCL
RCL
Left ADC clipping indicator
0 - Normal
1 - Clipping
Right ADC clipping indicator
0 - Normal
1 - Clipping
Sub-frame Bits 49 to 60
These bits are reserved, and can be 0 or 1.
Sub-frame Bits 61 to 64
61
62
63
64
RESERVED bits can be 0 or 1
DI1 DI2 DI3 DI4
DI1-DI4 These bits follow the state of the Digital
Input pins. In SM3 DI3 and DI4 are used
and unavailable. In SM4 DI2, DI3, & DI4
are not available as input bits.
Sub-frame
Sub-frame
Word B
Word A
3
3
0
0
3
0
ADC - Left Word
.
ADC - Right Word
ADC - Right Word
Version
Error
Error
X
X
X
X
X
X
0
0
X
X
X
X
X
X
X
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
SM1 and SM2
3
0
ADC - Left Word
X
X
Version
X
X
X
SM3
Figure 6. Serial Data Output Format - SM1, SM2, and SM3.
DS83F2
13
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