CS35L00
ELECTRICAL CHARACTERISTICS - FHD MODE
Parameters
Symbol
Test Conditions
Min
Typ
Max Units
THD+N = 1%
RL = 8 (VBATT = 5.0/4.2/3.7 VDC)
RL = 4 (VBATT = 5.0/4.2/3.7 VDC)
-
-
-
-
1.27/0.88/0.68
2.09/1.45/1.10
W
W
Output Power
(Continuous Average)
PO
THD+N = 10%
-
-
-
-
RL = 8 (VBATT = 5.0/4.2/3.7 VDC)
RL = 4 (VBATT = 5.0/4.2/3.7 VDC)
1.63/1.14/0.88
2.69/1.87/1.43
W
W
PO = 1.0 W
-
0.15
-
%
Total Harmonic Distortion + Noise THD+N
Vripple = 200 mVPP, AINx AC coupled to GND
-
-
75
75
-
-
dB
dB
Power Supply Rejection Ratio
Common-Mode Rejection Ratio
PSRR
CMRR
@ 217 Hz
@ 1 kHz
Vripple = 1 VPP, fripple = 217 Hz
-
55
-
dB
Inputs AC Coupled to Ground,
Referenced to 1% THD+N
(Note 12)
Signal to Noise Ratio
A-Weighted
SNRA
GAIN_SEL = Low (12 dB)
GAIN_SEL = High (6 dB)
-
-
92
93
-
-
dB
dB
AIN+ connected to AIN-
Idle Channel Noise
A-Weighted
ICNA
ICN
GAIN_SEL = Low (12 dB)
GAIN_SEL = High (6 dB)
-
-
71
66
-
-
Vrms
Vrms
AIN+ connected to AIN-
Idle Channel Noise
GAIN_SEL = Low (12 dB)
GAIN_SEL = High (6 dB)
-
-
125
125
-
-
Vrms
Vrms
Frequency Response
FR
20 Hz to 20 kHz
-4.0
-
0
0.5
-
dB
fsw1
Input level below VIN-LDO
192
kHz
Output Switching Frequency
Output Switching Frequency
fsw2
Input level above VIN-VBATT
-
76
-
kHz
AIN+ connected AIN-, No Output Load
VBATT = 5 VDC
VBATT = 4.2 VDC
VBATT = 3.7 VDC
-
-
-
0.94
0.94
0.94
-
-
-
mA
mA
mA
Idle Current Draw
(Note 13)
IIDLE
GAIN_SEL = Low (12 dB)
GAIN_SEL = High (6 dB)
Input Impedance, Single Ended
ZIN
-
-
160
240
-
-
k
k
RL = 8 (VBATT = 5.0/4.2/3.7 VDC)
GAIN_SEL = Low (12 dB)
GAIN_SEL = High (6 dB)
-
-
0.82/0.69/0.60
1.64/1.37/1.20
-
-
Vrms
Vrms
Input Voltage @ 1 % THD+N
VICLIP
Note:
12.SNR dB is referenced to the output signal amplitude resulting in the specified output power at
A
THD+N <1%. See “Parameter Definitions” on page 29 for more information.
13.Idle Current Draw (I
) is specified without any output filtering. Refer to Section 5.3 on page 17 for
IDLE
information on output filtering. At idle, the output devices will switch at the same rate in HD and FHD
mode. FHD only changes the output switching frequency when the input levels are above the “Input
Level for Entering VBATT Operation in HD/FHD Modes (V
- All Operational Modes” on page 9.
) given in “Electrical Characteristics
IN-VBATT
DS906A2
13
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