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CS230002-CZZR 参数 Datasheet PDF下载

CS230002-CZZR图片预览
型号: CS230002-CZZR
PDF下载: 下载PDF文件 查看货源
内容描述: 1X,2X , 4x和8x时钟乘法器与内部LCO [1x, 2x, 4x, and 8x Clock Multiplier with Internal LCO]
分类和应用: 时钟
文件页数/大小: 3 页 / 84 K
品牌: CIRRUS [ CIRRUS LOGIC ]
 浏览型号CS230002-CZZR的Datasheet PDF文件第2页浏览型号CS230002-CZZR的Datasheet PDF文件第3页  
CS2300-02
1x, 2x, 4x, and 8x Clock Multiplier with Internal LCO
Features
Clock Multiplier / Jitter Reduction
– Generates a Low Jitter 6 - 75 MHz Clock
from a Jittery 750 kHz to 30 MHz Clock
Source
Internal LCO Reference Clock
128 Hz Loop Filter Bandwidth
Selectable Multiplication Factors
– 1x, 2x, 4x, and 8x
Output Enable Pin
Lock Indicator
Minimal Board Space Required
– No External Analog Loop-filter
Components
Ordering Information
The CS2300-02 is available in a 10-pin MSOP package
in Commercial (-10°C to +70°C) grade. Customer de-
velopment kits are also available for custom device
prototyping and device evaluation. Please see
for complete details.
Pin-Out Diagram
VD
GND
CLK_OUT
LOCK
CLK_IN
1
2
3
4
5
10
9
8
7
6
M0
M1
OUT_EN
FILTN
FILTP
General Description
The CS2300-02 is an extremely versatile system clock-
ing device that utilizes a programmable phase lock loop.
The CS2300-02 is based on a hybrid analog-digital PLL
architecture comprised of a unique combination of a
Delta-Sigma Fractional-N Frequency Synthesizer and a
Digital PLL. This architecture allows for generation of a
low-jitter clock relative to an external noisy synchroniza-
tion clock with frequencies as low as 750 kHz. The
CS2300-02 is a CS2300-OTP device that has been pre-
configured at the factory. There are three hardware con-
figuration pins available for mode and feature selection.
Hardware Controls Settings
M1
0
0
1
1
M0
0
1
0
1
PLL_OUT
1x CLK_IN
2x CLK_IN
4x CLK_IN
8x CLK_IN
OUT_EN
0
1
CLK_OUT
Enabled
High Impedance
FILTP
0.1 µF
LOCK
FILTN
LCO
PLL Lock
Indicator
6 MHz to 75 MHz
PLL Output
Output
Enable/Disable
Fractional-N
Frequency Synthesizer
M[1:0]
00=1x
01=2x
10=4x
11=8x
Output to Input
Clock Ratio
CLK_OUT
Ratio Selection
M1
M0
N
OUT_EN
750 kHz to 30 MHz
Frequency Reference
CLK_IN
128 Hz BW Digital PLL
& Fractional N Logic
VD
0.1 µF
1 µF
3.3 V
GND
Advance Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright
©
Cirrus Logic, Inc. 2008
(All Rights Reserved)
February '08
PS855A1