CS2300-CP
CONTROL PORT SWITCHING CHARACTERISTICS- I²C FORMAT
Inputs: Logic 0 = GND; Logic 1 = VD; C = 20 pF.
L
Parameter
SCL Clock Frequency
Symbol
fscl
Min
-
Max
Unit
kHz
µs
100
Bus Free-Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
tbuf
4.7
4.0
4.7
4.0
4.7
0
-
thdst
tlow
-
µs
-
µs
Clock High Time
thigh
tsust
thdd
tsud
tr
-
µs
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup Time to SCL Rising
Rise Time of SCL and SDA
-
µs
(Note 11)
-
µs
250
-
-
ns
1
300
-
µs
Fall Time SCL and SDA
tf
-
ns
Setup Time for Stop Condition
tsusp
tack
tdpor
4.7
300
100
µs
Acknowledge Delay from SCL Falling
Delay from Supply Voltage Stable to Control Port Ready
1000
-
ns
µs
Notes: 11. Data must be held for sufficient time to bridge the transition time, t , of SCL.
f
VD
t
dpor
Repeated
Start
Stop
SDA
t
t
t
buf
t
t
t
high
hdst
f
susp
hdst
SCL
Start
Stop
t
t
t
t
t
sust
sud
r
low
hdd
Figure 5. Control Port Timing - I²C Format
DS843F3
9
CIRRUS [ CIRRUS LOGIC ]
