CS2200-CP
5.2.3
Effective Ratio (R
)
EFF
The Effective Ratio (R
) is an internal calculation comprised of R and the appropriate modifiers, as
EFF
UD
previously described. R
is calculated as follows:
EFF
R
= RUD • R
EFF
MOD
To simplify operation the device handles some of the ratio calculation functions automatically (such as
when the internal timing reference clock divider is set). For this reason, the Effective Ratio does not need
to be altered to account for internal dividers.
Ratio modifiers which would produce an overflow or truncation of R
should not be used; For example
EFF
if R is 1024 an R
of 8 would produce an R
value of 8192 which exceeds the 4096 limit of the
UD
MOD
EFF
12.20 format. In all cases, the maximum and minimum allowable values for R
are dictated by the fre-
EFF
quency limits for both the input and output clocks as shown in the “AC Electrical Characteristics” on
page 7.
5.2.4
Ratio Configuration Summary
The R is the user defined ratio stored in the register space. R-Mod is applied if selected. The user de-
UD
fined ratio and ratio modifier make up the effective ratio R , the final calculation used to determine the
EFF
output to input clock ratio. The effective ratio is then corrected for the internal dividers. The conceptual
diagram in Figure 7 summarizes the features involved in the calculation of the ratio values used to gen-
erate the fractional-N value which controls the Frequency Synthesizer.
Timing Reference Clock
(XTI/REF_CLK)
Divide
RefClkDiv[1:0]
Effective Ratio REFF
Frequency
Synthesizer
PLL Outpu
SysClk
RModSel[2:0]
RefClkDiv[1:0]
Ratio Format
12.20
User Defined Ratio RUD
Ratio
Modifier
N
Ratio
R Correction
Figure 7. Ratio Feature Summary
Referenced Control
Register Location
Ratio......................................“Ratio (Address 06h - 09h)” on page 21
RModSel[2:0] ........................“R-Mod Selection (RModSel[2:0])” section on page 20
RefClkDiv[1:0] .......................“Reference Clock Input Divider (RefClkDiv[1:0])” on page 22
DS759PP1
13
CIRRUS [ CIRRUS LOGIC ]
