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CS2000CP-DZZ 参数 Datasheet PDF下载

CS2000CP-DZZ图片预览
型号: CS2000CP-DZZ
PDF下载: 下载PDF文件 查看货源
内容描述: [Phase Locked Loop, Hybrid, PDSO10, 3 MM, LEAD FREE, MO-187, MSOP-10]
分类和应用: 光电二极管
文件页数/大小: 37 页 / 1274 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS2000-CP
Fractional-N Clock Synthesizer & Clock Multiplier
Features
Delta-Sigma Fractional-N Frequency Synthesis
The CS2000-CP is an extremely versatile system
clocking device that utilizes a programmable phase
lock loop. The CS2000-CP is based on a hybrid ana-
log-digital PLL architecture comprised of a unique
combination of a Delta-Sigma Fractional-N Frequency
Synthesizer and a Digital PLL. This architecture allows
for both frequency synthesis/clock generation from a
stable reference clock as well as generation of a low-
jitter clock relative to an external noisy synchronization
clock. The design is also unique in that it can generate
low-jitter clocks relative to noisy external synchroniza-
tion clocks at frequencies as low as 50 Hz. The
CS2000-CP supports both I²C and SPI for full software
control.
The CS2000-CP is available in a 10-pin MSOP
package in Commercial (-10°C to +70°C), Automotive-
D (-40°C to +85°C), and Automotive-E (-40°C to
+105°C) grades. Customer development kits are also
available for device evaluation. Please see
for complete details.
Generates a Low Jitter 6 - 75 MHz Clock
from an 8 - 75 MHz Reference Clock
Clock Multiplier / Jitter Reduction
– Generates a Low Jitter 6 - 75 MHz Clock
from a Jittery or Intermittent 50 Hz to
30 MHz Clock Source
Highly Accurate PLL Multiplication Factor
– Maximum Error Less Than 1 PPM in High-
Resolution Mode
I²C / SPI™ Control Port
Configurable Auxiliary Output
Flexible Sourcing of Reference Clock
– External Oscillator or Clock Source
– Supports Inexpensive Local Crystal
Minimal Board Space Required
– No External Analog Loop-filter
Components
3.3 V
Timing Reference
Frequency Reference
PLL Output
Lock Indicator
I²C/SPI
Software Control
I²C / SPI
Auxiliary
Output
8 MHz to 75 MHz
Low-Jitter Timing
Reference
Fractional-N
Frequency Synthesizer
6 to 75 MHz
PLL Output
Output to Input
Clock Ratio
N
50 Hz to 30 MHz
Frequency
Reference
Digital PLL & Fractional
N Logic
Output to Input
Clock Ratio
Copyright
Cirrus Logic, Inc. 2009–2015
(All Rights Reserved)
SEPT '15
DS761F3