CS1610A/11A
CS1612A/13A
Parameter
Second Stage Zero-current Detect
FBZCD Threshold
Condition
Symbol
Min
Typ
Max
Unit
VFBZCD(th)
tFBZCB
IZCD
-
200
-
mV
FBZCD Blanking
CS1610A/12A
CS1611A/13A
-
-
2
2.8
-
-
s
s
ZCD Sink Current
(Note 3)
-2
-
-
-
-
mA
V
IZCD = 1mA
FBAUX Upper Voltage
VDD+0.6
Second Stage Pulse Width Modulator
Minimum On Time
-
0.55
-
s
Maximum On Time
CS1610A/11A/13A
CS1612A
-
-
8.8
12.0
-
-
s
s
Minimum Switching Frequency
tFB(Min)
tFB(Max)
-
-
625
200
-
-
Hz
Maximum Switching Frequency
Second Stage Gate Driver
Output Source Resistance
Output Sink Resistance
Rise Time
(Note 4)
kHz
ZOUT
ZOUT
-
-
-
-
20.3
-
9.4
-
CL = 0.25nF
CL = 0.25nF
-
-
30
20
ns
ns
Fall Time
Second Stage Protection
Overcurrent Protection (OCP)
Overvoltage Protection (OVP)
Open Loop Protection (OLP)
VOCP(th)
VOVP(th)
VOLP(th)
-
-
-
1.69
1.25
200
-
-
-
V
V
mV
External Overtemperature Protection (eOTP), Boost Peak Current, Second Stage Frequency Gain
Pull-up Current Source – Maximum
Conductance Accuracy
ICONNECT
-
-
-
-
80
-
-
±5
-
A
(Note 5)
(Note 5)
Conductance Offset
±250
1.25
nS
V
Current Source Voltage Threshold
VCONNECT(th)
-
Internal Overtemperature Protection (iOTP)
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
(Note 6)
(Note 6)
TSD
-
-
143
12
-
-
ºC
ºC
TSD(Hy)
Notes:
1. The CS1610A/11A/12A/13A has an internal shunt regulator that limits the voltage on the VDD pin. VZ, the shunt regulation
voltage, is defined in the VDD Supply Voltage section on page 4.
2. For test purposes, load capacitance CL is connected to pin GD and is equal to 0.25nF.
3. External circuitry should be designed to ensure that the ZCD current drawn from the internal clamp diode when it is forward biased
does not exceed specification.
4. Switching period (T1T2) 5s. Period T1 and T2 are defined in the Control Parameters section on page 12.
5. The conductance is specified in Siemens (S or 1/). Each LSB of the internal ADC corresponds to 250nS or one parallel 4M
resistor. Full scale corresponds to 256 parallel 4M resistors or 15.625k.
6. Specifications are guaranteed by design and are characterized and correlated using statistical process methods.
DS976PP4
5
CIRRUS [ CIRRUS LOGIC ]
